1 //===----------------------- R600FrameLowering.cpp ------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //==-----------------------------------------------------------------------===//
9 #include "R600FrameLowering.h"
10 #include "AMDGPUSubtarget.h"
11 #include "R600RegisterInfo.h"
12 #include "llvm/CodeGen/MachineFrameInfo.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/Support/MathExtras.h"
18 R600FrameLowering::~R600FrameLowering() = default;
20 /// \returns The number of registers allocated for \p FI.
21 int R600FrameLowering::getFrameIndexReference(const MachineFunction
&MF
,
23 unsigned &FrameReg
) const {
24 const MachineFrameInfo
&MFI
= MF
.getFrameInfo();
25 const R600RegisterInfo
*RI
26 = MF
.getSubtarget
<R600Subtarget
>().getRegisterInfo();
28 // Fill in FrameReg output argument.
29 FrameReg
= RI
->getFrameRegister(MF
);
31 // Start the offset at 2 so we don't overwrite work group information.
32 // FIXME: We should only do this when the shader actually uses this
34 unsigned OffsetBytes
= 2 * (getStackWidth(MF
) * 4);
35 int UpperBound
= FI
== -1 ? MFI
.getNumObjects() : FI
;
37 for (int i
= MFI
.getObjectIndexBegin(); i
< UpperBound
; ++i
) {
38 OffsetBytes
= alignTo(OffsetBytes
, MFI
.getObjectAlignment(i
));
39 OffsetBytes
+= MFI
.getObjectSize(i
);
40 // Each register holds 4 bytes, so we must always align the offset to at
41 // least 4 bytes, so that 2 frame objects won't share the same register.
42 OffsetBytes
= alignTo(OffsetBytes
, 4);
46 OffsetBytes
= alignTo(OffsetBytes
, MFI
.getObjectAlignment(FI
));
48 return OffsetBytes
/ (getStackWidth(MF
) * 4);