test/MC/AMDGPU/expressions-gfx10.s

   1 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -show-encoding %s | FileCheck %s --check-prefix=GFX10
   2 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 %s 2>&1 | FileCheck -check-prefix=NOGFX10 %s
   3
   4 i1=1
   5
   6 //===----------------------------------------------------------------------===//
   7 // Constant expressions may be used where literals are accepted.
   8 //===----------------------------------------------------------------------===//
   9
  10 v_bfe_u32 v0, i1+100, v1, v2
  11 // GFX10: v_bfe_u32 v0, 0x65, v1, v2      ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,0x65,0x00,0x00,0x00]
  12
  13 v_bfe_u32 v0, v1, i1-100, v2
  14 // GFX10: v_bfe_u32 v0, v1, 0xffffff9d, v2 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,0x9d,0xff,0xff,0xff]
  15
  16 v_bfe_u32 v0, v1, v2, (i1+100)*2
  17 // GFX10: v_bfe_u32 v0, v1, v2, 0xca      ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,0xca,0x00,0x00,0x00]
  18
  19 v_cmp_f_i32 s[10:11], (i1+100)*2, v2
  20 // GFX10: v_cmp_f_i32_e64 s[10:11], 0xca, v2   ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,0xca,0x00,0x00,0x00]
  21
  22 v_cmpx_f_i64 v[1:2], i1+100
  23 // GFX10: v_cmpx_f_i64_e64 v[1:2], 0x65   ; encoding: [0x00,0x00,0xb0,0xd4,0x01,0xff,0x01,0x00,0x65,0x00,0x00,0x00]
  24
  25 v_lshlrev_b64 v[5:6], i1+0xFFE, v[2:3]
  26 // GFX10: v_lshlrev_b64 v[5:6], 0xfff, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,0xff,0x0f,0x00,0x00]
  27
  28 //===----------------------------------------------------------------------===//
  29 // Relocatable expressions can be used with 32-bit instructions.
  30 //===----------------------------------------------------------------------===//
  31
  32 v_bfe_u32 v0, u, v1, v2
  33 // GFX10: v_bfe_u32 v0, u, v1, v2         ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,A,A,A,A]
  34 // GFX10-NEXT:                            ;   fixup A - offset: 8, value: u, kind: FK_PCRel_4
  35
  36 v_bfe_u32 v0, v1, u-1, v2
  37 // GFX10: v_bfe_u32 v0, v1, u-1, v2       ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,A,A,A,A]
  38 // GFX10-NEXT:                            ;   fixup A - offset: 8, value: u-1, kind: FK_Data_4
  39
  40 v_bfe_u32 v0, v1, v2, u+1
  41 // GFX10: v_bfe_u32 v0, v1, v2, u+1       ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,A,A,A,A]
  42 // GFX10-NEXT:                            ;   fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
  43
  44 v_cmp_f_i32 s[10:11], u+1, v2
  45 // GFX10: v_cmp_f_i32_e64 s[10:11], u+1, v2 ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,A,A,A,A]
  46 // GFX10-NEXT:                              ;   fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
  47
  48 v_lshlrev_b64 v[5:6], u-1, v[2:3]
  49 // GFX10: v_lshlrev_b64 v[5:6], u-1, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,A,A,A,A]
  50 // GFX10-NEXT:                              ;   fixup A - offset: 8, value: u-1, kind: FK_Data_4
  51
  52 //===----------------------------------------------------------------------===//
  53 // Instructions can use only one literal.
  54 // Relocatable expressions are counted as literals.
  55 //===----------------------------------------------------------------------===//
  56
  57 s_sub_u32 s0, 123, u
  58 // NOGFX10: error: only one literal operand is allowed
  59
  60 s_sub_u32 s0, u, u
  61 // NOGFX10: error: only one literal operand is allowed
  62
  63 s_sub_u32 s0, u, u1
  64 // NOGFX10: error: only one literal operand is allowed
  65
  66 v_bfe_u32 v0, v2, 123, u
  67 // NOGFX10: error: invalid literal operand
  68
  69 v_bfe_u32 v0, v2, u, u
  70 // NOGFX10: error: invalid literal operand
  71
  72 v_bfe_u32 v0, v2, u, u1
  73 // NOGFX10: error: invalid literal operand