test/MC/AMDGPU/sopc.s

   1 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=SICI %s
   2 // RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
   3 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICI %s
   4 // RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX10-ERR %s
   5
   6 //===----------------------------------------------------------------------===//
   7 // SOPC Instructions
   8 //===----------------------------------------------------------------------===//
   9
  10 s_cmp_eq_i32 s1, s2
  11 // GCN: s_cmp_eq_i32 s1, s2 ; encoding: [0x01,0x02,0x00,0xbf]
  12
  13 s_cmp_eq_i32 0xabcd1234, 0xabcd1234
  14 // GCN: s_cmp_eq_i32 0xabcd1234, 0xabcd1234 ; encoding: [0xff,0xff,0x00,0xbf,0x34,0x12,0xcd,0xab]
  15
  16 s_cmp_eq_i32 0xFFFF0000, -65536
  17 // GCN: s_cmp_eq_i32 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x00,0xbf,0x00,0x00,0xff,0xff]
  18
  19 s_cmp_lg_i32 s1, s2
  20 // GCN: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf]
  21
  22 s_cmp_gt_i32 s1, s2
  23 // GCN: s_cmp_gt_i32 s1, s2 ; encoding: [0x01,0x02,0x02,0xbf]
  24
  25 s_cmp_ge_i32 s1, s2
  26 // GCN: s_cmp_ge_i32 s1, s2 ; encoding: [0x01,0x02,0x03,0xbf]
  27
  28 s_cmp_lt_i32 s1, s2
  29 // GCN: s_cmp_lt_i32 s1, s2 ; encoding: [0x01,0x02,0x04,0xbf]
  30
  31 s_cmp_le_i32 s1, s2
  32 // GCN: s_cmp_le_i32 s1, s2 ; encoding: [0x01,0x02,0x05,0xbf]
  33
  34 s_cmp_eq_u32 s1, s2
  35 // GCN: s_cmp_eq_u32 s1, s2 ; encoding: [0x01,0x02,0x06,0xbf]
  36
  37 s_cmp_lg_u32 s1, s2
  38 // GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
  39
  40 s_cmp_gt_u32 s1, s2
  41 // GCN: s_cmp_gt_u32 s1, s2 ; encoding: [0x01,0x02,0x08,0xbf]
  42
  43 s_cmp_ge_u32 s1, s2
  44 // GCN: s_cmp_ge_u32 s1, s2 ; encoding: [0x01,0x02,0x09,0xbf]
  45
  46 s_cmp_lt_u32 s1, s2
  47 // GCN: s_cmp_lt_u32 s1, s2 ; encoding: [0x01,0x02,0x0a,0xbf]
  48
  49 s_cmp_le_u32 s1, s2
  50 // GCN: s_cmp_le_u32 s1, s2 ; encoding: [0x01,0x02,0x0b,0xbf]
  51
  52 s_bitcmp0_b32 s1, s2
  53 // GCN: s_bitcmp0_b32 s1, s2 ; encoding: [0x01,0x02,0x0c,0xbf]
  54
  55 s_bitcmp1_b32 s1, s2
  56 // GCN: s_bitcmp1_b32 s1, s2 ; encoding: [0x01,0x02,0x0d,0xbf]
  57
  58 s_bitcmp0_b64 s[2:3], s4
  59 // GCN: s_bitcmp0_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0e,0xbf]
  60
  61 s_bitcmp1_b64 s[2:3], s4
  62 // GCN: s_bitcmp1_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0f,0xbf]
  63
  64 s_setvskip s3, s5
  65 // GCN: s_setvskip s3, s5 ; encoding: [0x03,0x05,0x10,0xbf]
  66 // GFX10-ERR: error: instruction not supported on this GPU
  67
  68 s_cmp_eq_u64 s[0:1], s[2:3]
  69 // VI: s_cmp_eq_u64 s[0:1], s[2:3] ; encoding: [0x00,0x02,0x12,0xbf]
  70 // NOSICI: error: instruction not supported on this GPU
  71
  72 s_cmp_lg_u64 s[0:1], s[2:3]
  73 // VI: s_cmp_lg_u64 s[0:1], s[2:3] ; encoding: [0x00,0x02,0x13,0xbf]
  74 // NOSICI: error: instruction not supported on this GPU
  75
  76 gpr_idx = 1
  77 s_set_gpr_idx_on s0, gpr_idx
  78 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
  79 // NOSICI: error:
  80
  81 gpr_idx_mode = 10
  82 s_set_gpr_idx_on s0, gpr_idx_mode + 5
  83 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
  84 // NOSICI: error:
  85
  86 s_set_gpr_idx_on s0, 0
  87 // VI: s_set_gpr_idx_on s0, gpr_idx() ; encoding: [0x00,0x00,0x11,0xbf]
  88 // NOSICI: error:
  89
  90 s_set_gpr_idx_on s0, gpr_idx()
  91 // VI: s_set_gpr_idx_on s0, gpr_idx() ; encoding: [0x00,0x00,0x11,0xbf]
  92 // NOSICI: error:
  93
  94 s_set_gpr_idx_on s0, 1
  95 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
  96 // NOSICI: error:
  97
  98 s_set_gpr_idx_on s0, gpr_idx(SRC0)
  99 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
 100 // NOSICI: error:
 101
 102 s_set_gpr_idx_on s0, 3
 103 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1) ; encoding: [0x00,0x03,0x11,0xbf]
 104 // NOSICI: error:
 105
 106 s_set_gpr_idx_on s0, gpr_idx(SRC1,SRC0)
 107 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1) ; encoding: [0x00,0x03,0x11,0xbf]
 108 // NOSICI: error:
 109
 110 s_set_gpr_idx_on s0, 15
 111 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
 112 // NOSICI: error:
 113
 114 s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC2,SRC1)
 115 // VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
 116 // NOSICI: error: