test/MC/ARM/neon-bitcount-encoding.s

   1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
   2
   3 @ CHECK: vcnt.8 d16, d16                @ encoding: [0x20,0x05,0xf0,0xf3]
   4         vcnt.8  d16, d16
   5 @ CHECK: vcnt.8 q8, q8                  @ encoding: [0x60,0x05,0xf0,0xf3]
   6         vcnt.8  q8, q8
   7 @ CHECK: vclz.i8        d16, d16                @ encoding: [0xa0,0x04,0xf0,0xf3]
   8         vclz.i8 d16, d16
   9 @ CHECK: vclz.i16       d16, d16        @ encoding: [0xa0,0x04,0xf4,0xf3]
  10         vclz.i16        d16, d16
  11 @ CHECK: vclz.i32       d16, d16        @ encoding: [0xa0,0x04,0xf8,0xf3]
  12         vclz.i32        d16, d16
  13 @ CHECK: vclz.i8        q8, q8                  @ encoding: [0xe0,0x04,0xf0,0xf3]
  14         vclz.i8 q8, q8
  15 @ CHECK: vclz.i16       q8, q8          @ encoding: [0xe0,0x04,0xf4,0xf3]
  16         vclz.i16        q8, q8
  17 @ CHECK: vclz.i32       q8, q8          @ encoding: [0xe0,0x04,0xf8,0xf3]
  18         vclz.i32        q8, q8
  19 @ CHECK: vcls.s8        d16, d16                @ encoding: [0x20,0x04,0xf0,0xf3]
  20         vcls.s8 d16, d16
  21 @ CHECK: vcls.s16       d16, d16        @ encoding: [0x20,0x04,0xf4,0xf3]
  22         vcls.s16        d16, d16
  23 @ CHECK: vcls.s32       d16, d16        @ encoding: [0x20,0x04,0xf8,0xf3]
  24         vcls.s32        d16, d16
  25 @ CHECK: vcls.s8        q8, q8                  @ encoding: [0x60,0x04,0xf0,0xf3]
  26         vcls.s8 q8, q8
  27 @ CHECK: vcls.s16       q8, q8          @ encoding: [0x60,0x04,0xf4,0xf3]
  28         vcls.s16        q8, q8
  29 @ CHECK: vcls.s32       q8, q8          @ encoding: [0x60,0x04,0xf8,0xf3]
  30         vcls.s32        q8, q8
  31