test/MC/ARM/neon-complex.s

   1 // RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,+neon,+fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=THUMB --check-prefix=FP16-THUMB
   2 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NEON-STDERR <%t %s
   3 // RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,+neon,+fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=ARM --check-prefix=FP16-ARM
   4 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NEON-STDERR <%t %s
   5
   6 // RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,+neon,-fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=THUMB
   7 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-FP16-STDERR --check-prefix=NEON-STDERR <%t %s
   8 // RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,+neon,-fullfp16 -show-encoding < %s 2>%t | FileCheck %s --check-prefix=ARM
   9 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-FP16-STDERR --check-prefix=NEON-STDERR <%t %s
  10
  11 // RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.3a,-neon,+fullfp16 -show-encoding < %s 2>%t
  12 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-NEON-STDERR <%t %s
  13 // RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.3a,-neon,+fullfp16 -show-encoding < %s 2>%t
  14 // RUN: FileCheck --check-prefix=STDERR --check-prefix=NO-NEON-STDERR <%t %s
  15
  16 // RUN: not llvm-mc -triple thumb-none-linux-gnu -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V82A
  17 // RUN: not llvm-mc -triple arm-none-linux-gnu -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V82A
  18
  19 /* ==== VCMLA vector ==== */
  20
  21 // Valid types
  22   vcmla.f16 d0, d1, d2, #0
  23 // FP16-ARM: vcmla.f16       d0, d1, d2, #0  @ encoding: [0x02,0x08,0x21,0xfc]
  24 // FP16-THUMB: vcmla.f16       d0, d1, d2, #0  @ encoding: [0x21,0xfc,0x02,0x08]
  25 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
  26 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  27 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
  28   vcmla.f16 q0, q1, q2, #0
  29 // FP16-ARM: vcmla.f16       q0, q1, q2, #0  @ encoding: [0x44,0x08,0x22,0xfc]
  30 // FP16-THUMB: vcmla.f16       q0, q1, q2, #0  @ encoding: [0x22,0xfc,0x44,0x08]
  31 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
  32 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  33 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
  34   vcmla.f32 d0, d1, d2, #0
  35 // ARM: vcmla.f32       d0, d1, d2, #0  @ encoding: [0x02,0x08,0x31,0xfc]
  36 // THUMB: vcmla.f32       d0, d1, d2, #0  @ encoding: [0x31,0xfc,0x02,0x08]
  37 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  38 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  39   vcmla.f32 q0, q1, q2, #0
  40 // ARM: vcmla.f32       q0, q1, q2, #0  @ encoding: [0x44,0x08,0x32,0xfc]
  41 // THUMB: vcmla.f32       q0, q1, q2, #0  @ encoding: [0x32,0xfc,0x44,0x08]
  42 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  43 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  44
  45 // Valid rotations
  46   vcmla.f32 d0, d1, d2, #90
  47 // ARM: vcmla.f32       d0, d1, d2, #90 @ encoding: [0x02,0x08,0xb1,0xfc]
  48 // THUMB: vcmla.f32       d0, d1, d2, #90 @ encoding: [0xb1,0xfc,0x02,0x08]
  49 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  50 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  51   vcmla.f32 d0, d1, d2, #180
  52 // ARM: vcmla.f32       d0, d1, d2, #180 @ encoding: [0x02,0x08,0x31,0xfd]
  53 // THUMB: vcmla.f32       d0, d1, d2, #180 @ encoding: [0x31,0xfd,0x02,0x08]
  54 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  55 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  56   vcmla.f32 d0, d1, d2, #270
  57 // ARM: vcmla.f32       d0, d1, d2, #270 @ encoding: [0x02,0x08,0xb1,0xfd]
  58 // THUMB: vcmla.f32       d0, d1, d2, #270 @ encoding: [0xb1,0xfd,0x02,0x08]
  59 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  60 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  61
  62 // Invalid rotations
  63   vcmla.f32 d0, d1, d2, #-90
  64 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
  65 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
  66   vcmla.f32 d0, d1, d2, #1
  67 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
  68 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
  69   vcmla.f32 d0, d1, d2, #360
  70 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
  71 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
  72
  73 /* ==== VCADD vector ==== */
  74
  75 // Valid types
  76   vcadd.f16 d0, d1, d2, #90
  77 // FP16-ARM: vcadd.f16       d0, d1, d2, #90 @ encoding: [0x02,0x08,0x81,0xfc]
  78 // FP16-THUMB: vcadd.f16       d0, d1, d2, #90 @ encoding: [0x81,0xfc,0x02,0x08]
  79 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
  80 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  81 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
  82   vcadd.f16 q0, q1, q2, #90
  83 // FP16-ARM: vcadd.f16       q0, q1, q2, #90 @ encoding: [0x44,0x08,0x82,0xfc]
  84 // FP16-THUMB: vcadd.f16       q0, q1, q2, #90 @ encoding: [0x82,0xfc,0x44,0x08]
  85 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
  86 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  87 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
  88   vcadd.f32 d0, d1, d2, #90
  89 // ARM: vcadd.f32       d0, d1, d2, #90 @ encoding: [0x02,0x08,0x91,0xfc]
  90 // THUMB: vcadd.f32       d0, d1, d2, #90 @ encoding: [0x91,0xfc,0x02,0x08]
  91 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  92 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  93   vcadd.f32 q0, q1, q2, #90
  94 // ARM: vcadd.f32       q0, q1, q2, #90 @ encoding: [0x44,0x08,0x92,0xfc]
  95 // THUMB: vcadd.f32       q0, q1, q2, #90 @ encoding: [0x92,0xfc,0x44,0x08]
  96 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
  97 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
  98
  99 // Valid rotations
 100   vcadd.f32 d0, d1, d2, #270
 101 // ARM: vcadd.f32       d0, d1, d2, #270 @ encoding: [0x02,0x08,0x91,0xfd]
 102 // THUMB: vcadd.f32       d0, d1, d2, #270 @ encoding: [0x91,0xfd,0x02,0x08]
 103 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 104 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
 105
 106 // Invalid rotations
 107   vcadd.f32 d0, d1, d2, #0
 108 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
 109 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 110   vcadd.f32 d0, d1, d2, #180
 111 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
 112 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 113   vcadd.f32 d0, d1, d2, #-90
 114 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
 115 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 116   vcadd.f32 d0, d1, d2, #1
 117 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
 118 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 119   vcadd.f32 d0, d1, d2, #360
 120 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 90 or 270
 121 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 122
 123
 124 /* ==== VCMLA indexed ==== */
 125
 126 // Valid types
 127   vcmla.f16 d0, d1, d2[0], #0
 128 // FP16-ARM: vcmla.f16       d0, d1, d2[0], #0 @ encoding: [0x02,0x08,0x01,0xfe]
 129 // FP16-THUMB: vcmla.f16       d0, d1, d2[0], #0 @ encoding: [0x01,0xfe,0x02,0x08]
 130 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
 131 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 132 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
 133   vcmla.f16 q0, q1, d2[0], #0
 134 // FP16-ARM: vcmla.f16       q0, q1, d2[0], #0 @ encoding: [0x42,0x08,0x02,0xfe]
 135 // FP16-THUMB: vcmla.f16       q0, q1, d2[0], #0 @ encoding: [0x02,0xfe,0x42,0x08]
 136 // NO-FP16-STDERR: :[[@LINE-3]]:{{[0-9]*}}: note: instruction requires: full half-float
 137 // V82A: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 138 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
 139   vcmla.f32 d0, d1, d2[0], #0
 140 // ARM: vcmla.f32       d0, d1, d2[0], #0 @ encoding: [0x02,0x08,0x81,0xfe]
 141 // THUMB: vcmla.f32       d0, d1, d2[0], #0 @ encoding: [0x81,0xfe,0x02,0x08]
 142 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 143 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
 144   vcmla.f32 q0, q1, d2[0], #0
 145 // ARM: vcmla.f32       q0, q1, d2[0], #0 @ encoding: [0x42,0x08,0x82,0xfe]
 146 // THUMB: vcmla.f32       q0, q1, d2[0], #0 @ encoding: [0x82,0xfe,0x42,0x08]
 147 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 148 // NO-NEON_STDERR: :[[@LINE-5]]:{{[0-9]*}}: error: instruction requires: NEON
 149
 150 // Valid rotations
 151   vcmla.f32 d0, d1, d2[0], #90
 152 // ARM: vcmla.f32       d0, d1, d2[0], #90 @ encoding: [0x02,0x08,0x91,0xfe]
 153 // THUMB: vcmla.f32       d0, d1, d2[0], #90 @ encoding: [0x91,0xfe,0x02,0x08]
 154 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 155 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
 156   vcmla.f32 d0, d1, d2[0], #180
 157 // ARM: vcmla.f32       d0, d1, d2[0], #180 @ encoding: [0x02,0x08,0xa1,0xfe]
 158 // THUMB: vcmla.f32       d0, d1, d2[0], #180 @ encoding: [0xa1,0xfe,0x02,0x08]
 159 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 160 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
 161   vcmla.f32 d0, d1, d2[0], #270
 162 // ARM: vcmla.f32       d0, d1, d2[0], #270 @ encoding: [0x02,0x08,0xb1,0xfe]
 163 // THUMB: vcmla.f32       d0, d1, d2[0], #270 @ encoding: [0xb1,0xfe,0x02,0x08]
 164 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 165 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
 166
 167 // Invalid rotations
 168   vcmla.f32 d0, d1, d2[0], #-90
 169 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
 170 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 171   vcmla.f32 d0, d1, d2[0], #1
 172 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
 173 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 174   vcmla.f32 d0, d1, d2[0], #360
 175 // NEON-STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: complex rotation must be 0, 90, 180 or 270
 176 // NO-NEON-STDERR: :[[@LINE-2]]:{{[0-9]*}}: error: invalid instruction
 177
 178 // Valid indices
 179   vcmla.f16 d0, d1, d2[1], #0
 180 // FP16-ARM: vcmla.f16       d0, d1, d2[1], #0 @ encoding: [0x22,0x08,0x01,0xfe]
 181 // FP16-THUMB: vcmla.f16       d0, d1, d2[1], #0 @ encoding: [0x01,0xfe,0x22,0x08]
 182 // V82A: :[[@LINE-3]]:{{[0-9]*}}: error: instruction requires: armv8.3a
 183 // NO-NEON_STDERR: :[[@LINE-4]]:{{[0-9]*}}: error: instruction requires: NEON
 184
 185 // Invalid indices
 186 // The text of these errors vary depending on whether fullfp16 is present.
 187   vcmla.f16 d0, d1, d2[2], #0
 188 // STDERR: :[[@LINE-1]]:{{[0-9]*}}: error:
 189   vcmla.f32 d0, d1, d2[1], #0
 190 // STDERR: :[[@LINE-1]]:{{[0-9]*}}: error: