[obj2yaml] - Fix a comment. NFC.
[llvm-complete.git] / test / MC / ARM / thumb2-diagnostics.s
blobccc9d7b9df6ac800e2da5d3e2ebba360aa43abfa
1 @ RUN: not llvm-mc -triple=thumbv7-apple-darwin < %s 2> %t
2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V7 < %t %s
4 @ RUN: not llvm-mc -triple=thumbv8-apple-darwin < %s 2> %t
5 @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V8 < %t %s
7 @ Ill-formed IT block instructions.
8 itet eq
9 addle r0, r1, r2
10 nop
11 it le
12 iteeee gt
13 ittfe le
14 nopeq
16 @ CHECK-ERRORS: error: incorrect condition in IT block; got 'le', but expected 'eq'
17 @ CHECK-ERRORS: addle r0, r1, r2
18 @ CHECK-ERRORS: ^
19 @ CHECK-ERRORS: error: incorrect condition in IT block; got 'al', but expected 'ne'
20 @ CHECK-ERRORS: nop
21 @ CHECK-ERRORS: ^
22 @ CHECK-ERRORS: error: instructions in IT block must be predicable
23 @ CHECK-ERRORS: it le
24 @ CHECK-ERRORS: ^
25 @ CHECK-ERRORS: error: too many conditions on IT instruction
26 @ CHECK-ERRORS: iteeee gt
27 @ CHECK-ERRORS: ^
28 @ CHECK-ERRORS: error: illegal IT block condition mask 'tfe'
29 @ CHECK-ERRORS: ittfe le
30 @ CHECK-ERRORS: ^
31 @ CHECK-ERRORS: error: predicated instructions must be in IT block
32 @ CHECK-ERRORS: nopeq
33 @ CHECK-ERRORS: ^
35 @ Out of range immediates for MRC/MRC2/MRRC/MRRC2
36 mrc p14, #8, r1, c1, c2, #4
37 mrc p14, #1, r1, c1, c2, #8
38 mrc2 p14, #8, r1, c1, c2, #4
39 mrc2 p14, #0, r1, c1, c2, #9
40 mrrc p14, #16, r5, r4, c1
41 mrrc2 p14, #17, r5, r4, c1
42 @ CHECK-ERRORS: operand must be an immediate in the range [0,7]
43 @ CHECK-ERRORS: operand must be an immediate in the range [0,7]
44 @ CHECK-ERRORS-V7: operand must be an immediate in the range [0,7]
45 @ CHECK-ERRORS-V7: operand must be an immediate in the range [0,7]
46 @ CHECK-ERRORS-V8: invalid instruction
47 @ CHECK-ERRORS-V8: too many operands for instruction
48 @ CHECK-ERRORS: operand must be an immediate in the range [0,15]
49 @ CHECK-ERRORS-V7: operand must be an immediate in the range [0,15]
50 @ CHECK-ERRORS-V8: invalid instruction
52 isb #-1
53 isb #16
54 @ CHECK-ERRORS: error: immediate value out of range
55 @ CHECK-ERRORS: error: immediate value out of range
57 itt eq
58 bkpteq #1
59 @ CHECK-ERRORS: error: instruction 'bkpt' is not predicable, but condition code specified
61 nopeq
62 nopeq
64 @ out of range operands for Thumb2 targets
66 beq.w #-1048578
67 bne.w #1048576
68 blt.w #1013411
69 b.w #-16777218
70 b.w #16777216
71 b.w #1592313
73 @ CHECK-ERRORS: error: branch target out of range
74 @ CHECK-ERRORS: error: branch target out of range
75 @ CHECK-ERRORS: error: branch target out of range
76 @ CHECK-ERRORS: error: branch target out of range
77 @ CHECK-ERRORS: error: branch target out of range
78 @ CHECK-ERRORS: error: branch target out of range
80 foo2:
81 movw r0, foo2
82 movt r0, foo2
83 movt r0, #0x10000
84 movt r0, #0x10000
85 @ CHECK-ERRORS: error: immediate expression for mov requires :lower16: or :upper16
86 @ CHECK-ERRORS: ^
87 @ CHECK-ERRORS: immediate expression for mov requires :lower16: or :upper16
88 @ CHECK-ERRORS: ^
89 @ CHECK-ERRORS: error: operand must be an immediate in the range [0,0xffff] or a relocatable expression
90 @ CHECK-ERRORS: error: operand must be an immediate in the range [0,0xffff] or a relocatable expression
92 and sp, r1, #80008000
93 and pc, r1, #80008000
94 @ CHECK-ERRORS: error: invalid instruction
95 @ CHECK-ERRORS: error: invalid instruction
97 ssat r0, #1, r0, asr #32
98 usat r0, #1, r0, asr #32
99 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
100 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
102 @ PC is not valid as shifted-rGPR
103 sbc.w r2, r7, pc, lsr #16
104 and.w r2, r7, pc, lsr #16
105 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
106 @ CHECK-ERRORS: note: invalid operand for instruction
107 @ CHECK-ERRORS-V7: note: operand must be a register in range [r0, r12] or r14
108 @ CHECK-ERRORS-V8: note: operand must be a register in range [r0, r14]
109 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
110 @ CHECK-ERRORS: note: invalid operand for instruction
111 @ CHECK-ERRORS-V7: note: operand must be a register in range [r0, r12] or r14
112 @ CHECK-ERRORS-V8: note: operand must be a register in range [r0, r14]
115 @ PC is not valid as base of load
116 ldr r0, [pc, r0]
117 ldrb r1, [pc, r2]
118 ldrh r3, [pc, r3]
119 pld r4, [pc, r5]
120 str r6, [pc, r7]
121 strb r7 [pc, r8]
122 strh r9, [pc, r10]
123 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
124 @ CHECK-ERRORS: note: invalid operand for instruction
125 @ CHECK-ERRORS: note: instruction requires: arm-mode
126 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
127 @ CHECK-ERRORS: note: invalid operand for instruction
128 @ CHECK-ERRORS: note: instruction requires: arm-mode
129 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
130 @ CHECK-ERRORS: note: instruction requires: arm-mode
131 @ CHECK-ERRORS: note: invalid operand for instruction
132 @ CHECK-ERRORS: error: invalid instruction
133 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
134 @ CHECK-ERRORS: note: invalid operand for instruction
135 @ CHECK-ERRORS: note: instruction requires: arm-mode
136 @ CHECK-ERRORS: error: immediate value expected for vector index
137 @ CHECK-ERRORS: error: invalid instruction, any one of the following would fix this:
138 @ CHECK-ERRORS: note: instruction requires: arm-mode
139 @ CHECK-ERRORS: note: invalid operand for instruction
141 @ SWP(B) is an ARM-only instruction
142 swp r0, r1, [r2]
143 swpb r3, r4, [r5]
144 @ CHECK-ERRORS-V7: error: instruction requires: arm-mode
145 @ CHECK-ERRORS-V7: error: instruction requires: arm-mode
146 @ CHECK-ERRORS-V8: error: invalid instruction
147 @ CHECK-ERRORS-V8: error: invalid instruction
149 @ Generic error for too few operands
150 adds
151 adds r0
152 @ CHECK-ERRORS: error: too few operands for instruction
153 @ CHECK-ERRORS: error: too few operands for instruction
155 tst sp, #3
156 tst sp, r5
157 tst sp, r5, lsl #3
158 @ CHECK-ERRORS-V7: error: operand must be a register in range [r0, r12] or r14
159 @ CHECK-ERRORS-V7: operand must be a register in range [r0, r12] or r14
160 @ CHECK-ERRORS-V7: operand must be a register in range [r0, r12] or r14
162 teq sp, #5
163 teq sp, r7
164 teq sp, r9, lsl #2
165 @ CHECK-ERRORS-V7: error: operand must be a register in range [r0, r12] or r14
166 @ CHECK-ERRORS-V7: operand must be a register in range [r0, r12] or r14
167 @ CHECK-ERRORS-V7: operand must be a register in range [r0, r12] or r14