1 # RUN: not llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips 2>%t1
2 # RUN: FileCheck %s < %t1
4 addiur1sp $
7, 260 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4
5 addiur1sp $
7, 241 # CHECK: :[[@LINE]]:17: error: expected both 8-bit unsigned immediate and multiple of 4
6 addiur1sp $
8, 240 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction
7 addiusp
1032 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
8 addu16 $
6, $
14, $
4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 subu16 $
5, $
16, $
9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 andi16 $
16, $
10, 0x1f # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 andi16 $
16, $
2, 17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
12 and16 $
16, $
8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 not16 $
18, $
9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 or16 $
16, $
10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 xor16 $
15, $
5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 sll16 $
1, $
16, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 srl16 $
4, $
9, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18 sll16 $
3, $
16, 9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
19 srl16 $
4, $
5, 15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
20 addiur2 $
9, $
7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
21 addiur2 $
6, $
7, 10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
22 lwm16 $
5, $
6, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
23 lwm16 $
16, $
19, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
24 lwm16 $
16-$
25, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
25 lwm16 $
16, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
26 lwm16 $
16, $
17, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
27 lwm16 $
16-$
20, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
28 swm16 $
5, $
6, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
29 swm16 $
16, $
19, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
30 swm16 $
16-$
25, $ra
, 8($sp
) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
31 lwm32 $
5, $
6, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
32 lwm32 $
16, $
19, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
33 lwm32 $
16-$
25, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
34 swm32 $
5, $
6, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: $16 or $31 expected
35 swm32 $
16, $
19, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: consecutive register numbers expected
36 swm32 $
16-$
25, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
37 lwm32 $
16, $
17, $
18, $
19, $
20, $
21, $
22, $
23, $
24, 8($
4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register operand
38 addiupc $
7, 16777216 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
39 addiupc $
6, -16777220 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
40 addiupc $
3, 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
41 lbu16 $
9, 8($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
42 lhu16 $
9, 4($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
43 lw16 $
9, 8($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
44 sb16 $
9, 4($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
45 sh16 $
9, 8($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
46 sw16 $
9, 4($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
47 lbu16 $
3, -2($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
48 lhu16 $
3, 64($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
49 lw16 $
4, 68($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
50 sb16 $
3, 64($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
51 sh16 $
4, 68($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
52 sw16 $
4, 64($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
53 lbu16 $
3, -2($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
54 lhu16 $
3, 64($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
55 lw16 $
4, 68($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
56 sb16 $
16, 4($
16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
57 sh16 $
16, 8($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
58 sw16 $
16, 4($
17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
59 lbu16 $
16, 8($
9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
60 lhu16 $
16, 4($
9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
61 lw16 $
17, 8($
10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
62 sb16 $
7, 4($
9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
63 sh16 $
7, 8($
9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
64 sw16 $
7, 4($
10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
65 cache
-1, 8($
5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
66 cache
32, 8($
5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
67 pref
-1, 8($
5) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
68 pref
32, 8($
5) # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate
69 beqz16 $
9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
70 bnez16 $
9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
71 movep $
5, $
21, $
2, $
3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
72 movep $
8, $
6, $
2, $
3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
73 movep $
5, $
6, $
5, $
3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
74 movep $
5, $
6, $
2, $
9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
75 break
1024 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
76 break
1024, 5 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
77 break
7, 1024 # CHECK: :[[@LINE]]:12: error: expected 10-bit unsigned immediate
78 break
1024, 1024 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
79 wait
1024 # CHECK: :[[@LINE]]:8: error: expected 10-bit unsigned immediate
80 prefx
-1, $
8($
5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
81 prefx
32, $
8($
5) # CHECK: :[[@LINE]]:9: error: expected 5-bit unsigned immediate
82 jraddiusp
1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
83 jraddiusp
2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
84 jraddiusp
3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
85 jraddiusp
10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
86 jraddiusp
18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
87 jraddiusp
31 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
88 jraddiusp
33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
89 jraddiusp
125 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
90 jraddiusp
132 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected both 7-bit unsigned immediate and multiple of 4
91 lwu $
32, 4096($
32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number