test/MC/Mips/micromips-shift-instructions.s

   1 # RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EL %s
   2 # RUN: llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck -check-prefix=CHECK-EB %s
   3 # Check that the assembler can handle the documented syntax
   4 # for shift instructions.
   5 #------------------------------------------------------------------------------
   6 # Shift Instructions
   7 #------------------------------------------------------------------------------
   8 # Little endian
   9 #------------------------------------------------------------------------------
  10 # CHECK-EL: sll    $4, $3, 7      # encoding: [0x83,0x00,0x00,0x38]
  11 # CHECK-EL: sllv   $2, $3, $5     # encoding: [0x65,0x00,0x10,0x10]
  12 # CHECK-EL: sra    $4, $3, 7      # encoding: [0x83,0x00,0x80,0x38]
  13 # CHECK-EL: srav   $2, $3, $5     # encoding: [0x65,0x00,0x90,0x10]
  14 # CHECK-EL: srl    $4, $3, 7      # encoding: [0x83,0x00,0x40,0x38]
  15 # CHECK-EL: srlv   $2, $3, $5     # encoding: [0x65,0x00,0x50,0x10]
  16 # CHECK-EL: rotr   $9, $6, 7      # encoding: [0x26,0x01,0xc0,0x38]
  17 # CHECK-EL: rotrv  $9, $6, $7     # encoding: [0xc7,0x00,0xd0,0x48]
  18 # CHECK-EL: sllv   $2, $3, $5     # encoding: [0x65,0x00,0x10,0x10]
  19 # CHECK-EL: srav   $2, $3, $5     # encoding: [0x65,0x00,0x90,0x10]
  20 # CHECK-EL: srlv   $2, $3, $5     # encoding: [0x65,0x00,0x50,0x10]
  21 # CHECK-EL: sllv   $2, $2, $3     # encoding: [0x43,0x00,0x10,0x10]
  22 # CHECK-EL: srav   $2, $2, $3     # encoding: [0x43,0x00,0x90,0x10]
  23 # CHECK-EL: srlv   $2, $2, $3     # encoding: [0x43,0x00,0x50,0x10]
  24 # CHECK-EL: sll    $3, $3, 7      # encoding: [0x63,0x00,0x00,0x38]
  25 # CHECK-EL: sra    $3, $3, 7      # encoding: [0x63,0x00,0x80,0x38]
  26 # CHECK-EL: srl    $3, $3, 7      # encoding: [0x63,0x00,0x40,0x38]
  27 #------------------------------------------------------------------------------
  28 # Big endian
  29 #------------------------------------------------------------------------------
  30 # CHECK-EB: sll $4, $3, 7         # encoding: [0x00,0x83,0x38,0x00]
  31 # CHECK-EB: sllv  $2, $3, $5      # encoding: [0x00,0x65,0x10,0x10]
  32 # CHECK-EB: sra $4, $3, 7         # encoding: [0x00,0x83,0x38,0x80]
  33 # CHECK-EB: srav  $2, $3, $5      # encoding: [0x00,0x65,0x10,0x90]
  34 # CHECK-EB: srl $4, $3, 7         # encoding: [0x00,0x83,0x38,0x40]
  35 # CHECK-EB: srlv  $2, $3, $5      # encoding: [0x00,0x65,0x10,0x50]
  36 # CHECK-EB: rotr  $9, $6, 7       # encoding: [0x01,0x26,0x38,0xc0]
  37 # CHECK-EB: rotrv $9, $6, $7      # encoding: [0x00,0xc7,0x48,0xd0]
  38 # CHECK-EB: sllv $2, $3, $5       # encoding: [0x00,0x65,0x10,0x10]
  39 # CHECK-EB: srav $2, $3, $5       # encoding: [0x00,0x65,0x10,0x90]
  40 # CHECK-EB: srlv $2, $3, $5       # encoding: [0x00,0x65,0x10,0x50]
  41 # CHECK-EB: sllv $2, $2, $3       # encoding: [0x00,0x43,0x10,0x10]
  42 # CHECK-EB: srav $2, $2, $3       # encoding: [0x00,0x43,0x10,0x90]
  43 # CHECK-EB: srlv $2, $2, $3       # encoding: [0x00,0x43,0x10,0x50]
  44 # CHECK-EB: sll $3, $3, 7         # encoding: [0x00,0x63,0x38,0x00]
  45 # CHECK-EB: sra $3, $3, 7         # encoding: [0x00,0x63,0x38,0x80]
  46 # CHECK-EB: srl $3, $3, 7         # encoding: [0x00,0x63,0x38,0x40]
  47      sll    $4, $3, 7
  48      sllv   $2, $3, $5
  49      sra    $4, $3, 7
  50      srav   $2, $3, $5
  51      srl    $4, $3, 7
  52      srlv   $2, $3, $5
  53      rotr   $9, $6, 7
  54      rotrv  $9, $6, $7
  55      sll    $2, $3, $5
  56      sra    $2, $3, $5
  57      srl    $2, $3, $5
  58      sll    $2, $3
  59      sra    $2, $3
  60      srl    $2, $3
  61      sll    $3, 7
  62      sra    $3, 7
  63      srl    $3, 7