test/MC/Mips/mips32r3/valid-fp64.s

   1 # RUN: llvm-mc -arch=mips -mcpu=mips32r3 -mattr=+fp64 -show-encoding -show-inst %s | \
   2 # RUN: FileCheck %s
   3
   4 abs.d  $f0, $f12      # CHECK: abs.d  $f0, $f12      # encoding: [0x46,0x20,0x60,0x05]
   5                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FABS_D64
   6 abs.s $f0, $f12       # CHECK: abs.s  $f0, $f12      # encoding: [0x46,0x00,0x60,0x05]
   7                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FABS_S
   8 add.d   $f0, $f2, $f4 # CHECK: add.d   $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x00]
   9                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FADD_D64
  10 cvt.d.s $f0, $f2      # CHECK: cvt.d.s $f0, $f2      # encoding: [0x46,0x00,0x10,0x21]
  11                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} CVT_D64_S
  12 cvt.d.w $f0, $f2      # CHECK: cvt.d.w $f0, $f2      # encoding: [0x46,0x80,0x10,0x21]
  13                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} CVT_D64_W
  14 cvt.s.d $f0, $f2      # CHECK: cvt.s.d $f0, $f2      # encoding: [0x46,0x20,0x10,0x20]
  15                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} CVT_S_D64
  16 cvt.w.d $f0, $f2      # CHECK: cvt.w.d $f0, $f2      # encoding: [0x46,0x20,0x10,0x24]
  17                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} CVT_W_D64
  18 div.d   $f0, $f2, $f4 # CHECK: div.d   $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x03]
  19                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FDIV_D64
  20 mfhc1   $4, $f0       # CHECK: mfhc1   $4, $f0       # encoding: [0x44,0x64,0x00,0x00]
  21                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} MFHC1_D64
  22 mov.d   $f0, $f2      # CHECK: mov.d   $f0, $f2      # encoding: [0x46,0x20,0x10,0x06]
  23                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FMOV_D64
  24 mthc1   $4, $f0       # CHECK: mthc1   $4, $f0       # encoding: [0x44,0xe4,0x00,0x00]
  25                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} MTHC1_D64
  26 mul.d   $f0, $f2, $f4 # CHECK: mul.d $f0, $f2, $f4   # encoding: [0x46,0x24,0x10,0x02]
  27                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FMUL_D64
  28 neg.d   $f0, $f2      # CHECK: neg.d   $f0, $f2      # encoding: [0x46,0x20,0x10,0x07]
  29                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FNEG_D64
  30 sqrt.d  $f0, $f12     # CHECK: sqrt.d $f0, $f12      # encoding: [0x46,0x20,0x60,0x04]
  31                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FSQRT_D64
  32 sqrt.s  $f0, $f12     # CHECK: sqrt.s $f0, $f12      # encoding: [0x46,0x00,0x60,0x04]
  33                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FSQRT_S
  34 sub.d   $f0, $f2, $f4 # CHECK: sub.d $f0, $f2, $f4   # encoding: [0x46,0x24,0x10,0x01]
  35                       # CHECK-NEXT:                  # <MCInst #{{[0-9]+}} FSUB_D64