1 # Instructions that should be valid but currently fail for known reasons (e.g.
2 # they aren't implemented yet).
3 # This test is set up to XPASS if any instruction generates an encoding.
5 # RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r3 | not FileCheck %s
13 addqh_r.w $
8,$v1
,$zero
14 alnv.ob $v22
,$v19
,$v30
,$v1
15 alnv.ob $v31
,$v23
,$v30
,$at
16 alnv.ob $v8
,$v17
,$v30
,$a1
17 alnv.ps $
f12,$
f18,$
f30,$
12
19 c.f.ps $fcc6
,$
f11,$
f11
20 c.le.ps $fcc1
,$
f7,$
f20
24 c.ngle.ps $fcc7
,$
f12,$
f20
25 c.ngt.ps $fcc5
,$
f30,$
f6
26 c.ole.ps $fcc7
,$
f21,$
f8
27 c.olt.ps $fcc3
,$
f7,$
f16
28 c.seq.ps $fcc6
,$
f31,$
f14
30 c.ueq.ps $fcc1
,$
f5,$
f29
31 c.ule.ps $fcc6
,$
f17,$
f3
32 c.ult.ps $fcc7
,$
f14,$
f0
33 c.un.ps $fcc4
,$
f2,$
f26
34 dmfc0 $
10,c0_watchhi
,2
35 dmfgc0 $gp
,c0_perfcnt
,6
38 dmtgc0 $a2
,c0_watchlo
,2
53 madd.ps $
f22,$
f3,$
f14,$
f3
56 movf.ps $
f10,$
f28,$fcc6
58 movt.ps $
f20,$
f25,$fcc2
61 msgn.qh $v12
,$v21
,$v0
[1]
62 msub.ps $
f12,$
f14,$
f29,$
f17
67 nmadd.ps $
f27,$
f4,$
f9,$
f25
68 nmsub.ps $
f6,$
f12,$
f14,$
f17