test/MC/PowerPC/ppc64-relocs-01.s

   1 # RUN: llvm-mc -triple=powerpc64-unknown-linux-gnu -filetype=obj %s | \
   2 # RUN: llvm-readobj -r | FileCheck %s
   3
   4         .section .opd,"aw",@progbits
   5 access_int64:
   6         .quad .L.access_int64
   7         .quad .TOC.@tocbase
   8         .quad 0
   9         .text
  10 .L.access_int64:
  11         ld 4, .LC1@toc(2)
  12         bl sin
  13
  14         .section .toc,"aw",@progbits
  15 .LC1:
  16         .tc number64[TC],number64
  17         .data
  18         .globl number64
  19 number64:
  20         .quad   10
  21
  22 # CHECK:      Relocations [
  23
  24 # The relocations in .rela.text are the 'number64' load using a
  25 # R_PPC64_TOC16_DS against the .toc and the 'sin' external function
  26 # address using a R_PPC64_REL24
  27 # CHECK:        Section ({{[0-9]+}}) .rela.text {
  28 # CHECK-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc
  29 # CHECK-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_REL24    sin
  30 # CHECK-NEXT:   }
  31
  32 # The .opd entry for the 'access_int64' function creates 2 relocations:
  33 # 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
  34 #    address itself);
  35 # 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
  36 #    module's TOC base).
  37 # CHECK:        Section ({{[0-9]+}}) .rela.opd {
  38 # CHECK-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0
  39 # CHECK-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0
  40
  41 # Finally the TOC creates the relocation for the 'number64'.
  42 # CHECK:        Section ({{[0-9]+}}) .rela.toc {
  43 # CHECK-NEXT:     0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0
  44 # CHECK-NEXT:   }
  45
  46 # CHECK-NEXT: ]