[obj2yaml] - Fix a comment. NFC.
[llvm-complete.git] / test / MC / RISCV / rvf-aliases-valid.s
blob0d8179ff31f92ceed557bb8d85da0bf3d064c3ab
1 # RUN: llvm-mc %s -triple=riscv32 -mattr=+f -riscv-no-aliases \
2 # RUN: | FileCheck -check-prefix=CHECK-INST %s
3 # RUN: llvm-mc %s -triple=riscv32 -mattr=+f \
4 # RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
5 # RUN: llvm-mc %s -triple=riscv64 -mattr=+f -riscv-no-aliases \
6 # RUN: | FileCheck -check-prefix=CHECK-INST %s
7 # RUN: llvm-mc %s -triple=riscv64 -mattr=+f \
8 # RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
9 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
10 # RUN: | llvm-objdump -d -mattr=+f -M no-aliases - \
11 # RUN: | FileCheck -check-prefix=CHECK-INST %s
12 # RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
13 # RUN: | llvm-objdump -d -mattr=+f - \
14 # RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
15 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
16 # RUN: | llvm-objdump -d -mattr=+f -M no-aliases - \
17 # RUN: | FileCheck -check-prefix=CHECK-INST %s
18 # RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
19 # RUN: | llvm-objdump -d -mattr=+f - \
20 # RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
22 ##===----------------------------------------------------------------------===##
23 ## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)
24 ##===----------------------------------------------------------------------===##
26 # TODO flw
27 # TODO fsw
29 # CHECK-INST: fsgnj.s ft0, ft1, ft1
30 # CHECK-ALIAS: fmv.s ft0, ft1
31 fmv.s f0, f1
32 # CHECK-INST: fsgnjx.s ft1, ft2, ft2
33 # CHECK-ALIAS: fabs.s ft1, ft2
34 fabs.s f1, f2
35 # CHECK-INST: fsgnjn.s ft2, ft3, ft3
36 # CHECK-ALIAS: fneg.s ft2, ft3
37 fneg.s f2, f3
39 # CHECK-INST: flt.s tp, ft6, ft5
40 # CHECK-ALIAS: flt.s tp, ft6, ft5
41 fgt.s x4, f5, f6
42 # CHECK-INST: fle.s t2, fs1, fs0
43 # CHECK-ALIAS: fle.s t2, fs1, fs0
44 fge.s x7, f8, f9
46 # The following instructions actually alias instructions from the base ISA.
47 # However, it only makes sense to support them when the F extension is enabled.
48 # CHECK-INST: csrrs t0, fcsr, zero
49 # CHECK-ALIAS: frcsr t0
50 frcsr x5
51 # CHECK-INST: csrrw t1, fcsr, t2
52 # CHECK-ALIAS: fscsr t1, t2
53 fscsr x6, x7
54 # CHECK-INST: csrrw zero, fcsr, t3
55 # CHECK-ALIAS: fscsr t3
56 fscsr x28
58 # These are obsolete aliases of frcsr/fscsr. They are accepted by the assembler
59 # but the disassembler should always print them as the equivalent, new aliases.
60 # CHECK-INST: csrrs t4, fcsr, zero
61 # CHECK-ALIAS: frcsr t4
62 frsr x29
63 # CHECK-INST: csrrw t5, fcsr, t6
64 # CHECK-ALIAS: fscsr t5, t6
65 fssr x30, x31
66 # CHECK-INST: csrrw zero, fcsr, s0
67 # CHECK-ALIAS: fscsr s0
68 fssr x8
70 # CHECK-INST: csrrs t4, frm, zero
71 # CHECK-ALIAS: frrm t4
72 frrm x29
73 # CHECK-INST: csrrw t5, frm, t4
74 # CHECK-ALIAS: fsrm t5, t4
75 fsrm x30, x29
76 # CHECK-INST: csrrw zero, frm, t6
77 # CHECK-ALIAS: fsrm t6
78 fsrm x31
79 # CHECK-INST: csrrwi a0, frm, 31
80 # CHECK-ALIAS: fsrmi a0, 31
81 fsrmi x10, 0x1f
82 # CHECK-INST: csrrwi zero, frm, 30
83 # CHECK-ALIAS: fsrmi 30
84 fsrmi 0x1e
86 # CHECK-INST: csrrs a1, fflags, zero
87 # CHECK-ALIAS: frflags a1
88 frflags x11
89 # CHECK-INST: csrrw a2, fflags, a1
90 # CHECK-ALIAS: fsflags a2, a1
91 fsflags x12, x11
92 # CHECK-INST: csrrw zero, fflags, a3
93 # CHECK-ALIAS: fsflags a3
94 fsflags x13
95 # CHECK-INST: csrrwi a4, fflags, 29
96 # CHECK-ALIAS: fsflagsi a4, 29
97 fsflagsi x14, 0x1d
98 # CHECK-INST: csrrwi zero, fflags, 28
99 # CHECK-ALIAS: fsflagsi 28
100 fsflagsi 0x1c
102 # CHECK-INST: fmv.x.w a2, fs7
103 # CHECK-ALIAS: fmv.x.w a2, fs7
104 fmv.x.s a2, fs7
105 # CHECK-INST: fmv.w.x ft1, a6
106 # CHECK-ALIAS: fmv.w.x ft1, a6
107 fmv.s.x ft1, a6
109 # CHECK-INST: flw ft0, 0(a0)
110 # CHECK-ALIAS: flw ft0, 0(a0)
111 flw f0, (x10)
112 # CHECK-INST: fsw ft0, 0(a0)
113 # CHECK-ALIAS: fsw ft0, 0(a0)
114 fsw f0, (x10)
116 ##===----------------------------------------------------------------------===##
117 ## Aliases which omit the rounding mode.
118 ##===----------------------------------------------------------------------===##
120 # CHECK-INST: fmadd.s fa0, fa1, fa2, fa3, dyn
121 # CHECK-ALIAS: fmadd.s fa0, fa1, fa2, fa3{{[[:space:]]}}
122 fmadd.s f10, f11, f12, f13
123 # CHECK-INST: fmsub.s fa4, fa5, fa6, fa7, dyn
124 # CHECK-ALIAS: fmsub.s fa4, fa5, fa6, fa7{{[[:space:]]}}
125 fmsub.s f14, f15, f16, f17
126 # CHECK-INST: fnmsub.s fs2, fs3, fs4, fs5, dyn
127 # CHECK-ALIAS: fnmsub.s fs2, fs3, fs4, fs5{{[[:space:]]}}
128 fnmsub.s f18, f19, f20, f21
129 # CHECK-INST: fnmadd.s fs6, fs7, fs8, fs9, dyn
130 # CHECK-ALIAS: fnmadd.s fs6, fs7, fs8, fs9{{[[:space:]]}}
131 fnmadd.s f22, f23, f24, f25
132 # CHECK-INST: fadd.s fs10, fs11, ft8, dyn
133 # CHECK-ALIAS: fadd.s fs10, fs11, ft8{{[[:space:]]}}
134 fadd.s f26, f27, f28
135 # CHECK-INST: fsub.s ft9, ft10, ft11, dyn
136 # CHECK-ALIAS: fsub.s ft9, ft10, ft11{{[[:space:]]}}
137 fsub.s f29, f30, f31
138 # CHECK-INST: fmul.s ft0, ft1, ft2, dyn
139 # CHECK-ALIAS: fmul.s ft0, ft1, ft2{{[[:space:]]}}
140 fmul.s ft0, ft1, ft2
141 # CHECK-INST: fdiv.s ft3, ft4, ft5, dyn
142 # CHECK-ALIAS: fdiv.s ft3, ft4, ft5{{[[:space:]]}}
143 fdiv.s ft3, ft4, ft5
144 # CHECK-INST: fsqrt.s ft6, ft7, dyn
145 # CHECK-ALIAS: fsqrt.s ft6, ft7{{[[:space:]]}}
146 fsqrt.s ft6, ft7
147 # CHECK-INST: fcvt.w.s a0, fs5, dyn
148 # CHECK-ALIAS: fcvt.w.s a0, fs5{{[[:space:]]}}
149 fcvt.w.s a0, fs5
150 # CHECK-INST: fcvt.wu.s a1, fs6, dyn
151 # CHECK-ALIAS: fcvt.wu.s a1, fs6{{[[:space:]]}}
152 fcvt.wu.s a1, fs6
153 # CHECK-INST: fcvt.s.w ft11, a4, dyn
154 # CHECK-ALIAS: fcvt.s.w ft11, a4{{[[:space:]]}}
155 fcvt.s.w ft11, a4
156 # CHECK-INST: fcvt.s.wu ft0, a5, dyn
157 # CHECK-ALIAS: fcvt.s.wu ft0, a5{{[[:space:]]}}
158 fcvt.s.wu ft0, a5