lib/Target/IA64/IA64TargetMachine.cpp

   1 //===-- IA64TargetMachine.cpp - Define TargetMachine for IA64 -------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Duraid Madina and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines the IA64 specific subclass of TargetMachine.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "IA64TargetMachine.h"
  15 #include "IA64.h"
  16 #include "llvm/Module.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/MachineFunction.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/Target/TargetOptions.h"
  21 #include "llvm/Target/TargetMachineRegistry.h"
  22 #include "llvm/Transforms/Scalar.h"
  23 #include "llvm/Support/CommandLine.h"
  24 #include "llvm/ADT/Statistic.h"
  25 #include <iostream>
  26 using namespace llvm;
  27
  28 /// IA64TargetMachineModule - Note that this is used on hosts that cannot link
  29 /// in a library unless there are references into the library.  In particular,
  30 /// it seems that it is not possible to get things to work on Win32 without
  31 /// this.  Though it is unused, do not remove it.
  32 extern "C" int IA64TargetMachineModule;
  33 int IA64TargetMachineModule = 0;
  34
  35 namespace {
  36   cl::opt<bool> DisableOutput("disable-ia64-llc-output", cl::Hidden,
  37                               cl::desc("Disable the IA64 asm printer, for use "
  38                                        "when profiling the code generator."));
  39
  40   cl::opt<bool> EnableDAGIsel("enable-ia64-dag-isel", cl::Hidden,
  41                               cl::desc("Enable the IA64 DAG->DAG isel"));
  42
  43   // Register the target.
  44   RegisterTarget<IA64TargetMachine> X("ia64", "  IA-64 (Itanium)");
  45 }
  46
  47 unsigned IA64TargetMachine::compileTimeMatchQuality() {
  48 #if defined(__ia64__) || defined(__IA64__)
  49   return 50;
  50 #else
  51   return 0;
  52 #endif
  53 }
  54
  55 unsigned IA64TargetMachine::getModuleMatchQuality(const Module &M) {
  56   // we match [iI][aA]*64
  57   bool seenIA64=false;
  58   std::string TT = M.getTargetTriple();
  59
  60   if (TT.size() >= 4) {
  61     if( (TT[0]=='i' || TT[0]=='I') &&
  62         (TT[1]=='a' || TT[1]=='A') ) {
  63       for(unsigned int i=2; i<(TT.size()-1); i++)
  64         if(TT[i]=='6' && TT[i+1]=='4')
  65           seenIA64=true;
  66     }
  67
  68     if(seenIA64)
  69       return 50; // strong match
  70   }
  71
  72   return compileTimeMatchQuality()/2;
  73
  74 }
  75
  76 /// IA64TargetMachine ctor - Create an LP64 architecture model
  77 ///
  78 IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
  79   : TargetMachine("IA64", true),
  80     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
  81     TLInfo(*this) { // FIXME? check this stuff
  82 }
  83
  84 // addPassesToEmitFile - We currently use all of the same passes as the JIT
  85 // does to emit statically compiled machine code.
  86 bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM,
  87                                             std::ostream &Out,
  88                                             CodeGenFileType FileType,
  89                                             bool Fast) {
  90   if (FileType != TargetMachine::AssemblyFile) return true;
  91
  92   // FIXME: Implement efficient support for garbage collection intrinsics.
  93   PM.add(createLowerGCPass());
  94
  95   // FIXME: Implement the invoke/unwind instructions!
  96   PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704
  97                                           // bytes and must be 16byte aligned
  98
  99   // Make sure that no unreachable blocks are instruction selected.
 100   PM.add(createUnreachableBlockEliminationPass());
 101
 102   // Add an instruction selector
 103 // FIXME: reap this option one day:  if(EnableDAGIsel)
 104   PM.add(createIA64DAGToDAGInstructionSelector(*this));
 105
 106 /* XXX not yet. ;)
 107   // Run optional SSA-based machine code optimizations next...
 108   if (!NoSSAPeephole)
 109     PM.add(createIA64SSAPeepholeOptimizerPass());
 110 */
 111
 112   // Print the instruction selected machine code...
 113   if (PrintMachineCode)
 114     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 115
 116   // Perform register allocation to convert to a concrete IA64 representation
 117   PM.add(createRegisterAllocator());
 118
 119   if (PrintMachineCode)
 120     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 121
 122   if (PrintMachineCode)
 123     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 124
 125   // Insert prolog/epilog code.  Eliminate abstract frame index references...
 126   PM.add(createPrologEpilogCodeInserter());
 127
 128 /* XXX no, not just yet */
 129 //  PM.add(createIA64PeepholeOptimizerPass());
 130
 131   // Make sure everything is bundled happily
 132   PM.add(createIA64BundlingPass(*this));
 133
 134   if (PrintMachineCode)  // Print the register-allocated code
 135     PM.add(createIA64CodePrinterPass(std::cerr, *this));
 136
 137   if (!DisableOutput)
 138     PM.add(createIA64CodePrinterPass(Out, *this));
 139
 140   // Delete machine code for this function
 141   PM.add(createMachineCodeDeleter());
 142
 143   return false; // success!
 144 }
 145