1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Target/TargetOptions.h"
30 class PPCCodeEmitter
: public MachineFunctionPass
{
32 MachineCodeEmitter
&MCE
;
34 // Tracks which instruction references which BasicBlock
35 std::vector
<std::pair
<MachineBasicBlock
*, unsigned*> > BBRefs
;
36 // Tracks where each BasicBlock starts
37 std::map
<MachineBasicBlock
*, long> BBLocations
;
39 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
41 int getMachineOpValue(MachineInstr
&MI
, MachineOperand
&MO
);
44 PPCCodeEmitter(TargetMachine
&T
, MachineCodeEmitter
&M
)
47 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
49 /// runOnMachineFunction - emits the given MachineFunction to memory
51 bool runOnMachineFunction(MachineFunction
&MF
);
53 /// emitBasicBlock - emits the given MachineBasicBlock to memory
55 void emitBasicBlock(MachineBasicBlock
&MBB
);
57 /// emitWord - write a 32-bit word to memory at the current PC
59 void emitWord(unsigned w
) { MCE
.emitWord(w
); }
61 /// getValueBit - return the particular bit of Val
63 unsigned getValueBit(int64_t Val
, unsigned bit
) { return (Val
>> bit
) & 1; }
65 /// getBinaryCodeForInstr - This function, generated by the
66 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
67 /// machine instructions.
69 unsigned getBinaryCodeForInstr(MachineInstr
&MI
);
73 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
74 /// machine code emitted. This uses a MachineCodeEmitter object to handle
75 /// actually outputting the machine code and resolving things like the address
76 /// of functions. This method should returns true if machine code emission is
79 bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager
&PM
,
80 MachineCodeEmitter
&MCE
) {
81 // Machine code emitter pass for PowerPC
82 PM
.add(new PPCCodeEmitter(*this, MCE
));
83 // Delete machine code for this function after emitting it
84 PM
.add(createMachineCodeDeleter());
88 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction
&MF
) {
89 assert((MF
.getTarget().getRelocationModel() != Reloc::Default
||
90 MF
.getTarget().getRelocationModel() != Reloc::Static
) &&
91 "JIT relocation model must be set to static or default!");
92 MCE
.startFunction(MF
);
93 MCE
.emitConstantPool(MF
.getConstantPool());
94 for (MachineFunction::iterator BB
= MF
.begin(), E
= MF
.end(); BB
!= E
; ++BB
)
96 MCE
.finishFunction(MF
);
98 // Resolve branches to BasicBlocks for the entire function
99 for (unsigned i
= 0, e
= BBRefs
.size(); i
!= e
; ++i
) {
100 intptr_t Location
= BBLocations
[BBRefs
[i
].first
];
101 unsigned *Ref
= BBRefs
[i
].second
;
102 DEBUG(std::cerr
<< "Fixup @ " << (void*)Ref
<< " to " << (void*)Location
104 unsigned Instr
= *Ref
;
105 intptr_t BranchTargetDisp
= (Location
- (intptr_t)Ref
) >> 2;
107 switch (Instr
>> 26) {
108 default: assert(0 && "Unknown branch user!");
109 case 18: // This is B or BL
110 *Ref
|= (BranchTargetDisp
& ((1 << 24)-1)) << 2;
112 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
113 *Ref
|= (BranchTargetDisp
& ((1 << 14)-1)) << 2;
123 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock
&MBB
) {
124 BBLocations
[&MBB
] = MCE
.getCurrentPCValue();
125 for (MachineBasicBlock::iterator I
= MBB
.begin(), E
= MBB
.end(); I
!= E
; ++I
){
126 MachineInstr
&MI
= *I
;
127 unsigned Opcode
= MI
.getOpcode();
128 switch (MI
.getOpcode()) {
130 emitWord(getBinaryCodeForInstr(*I
));
132 case PPC::IMPLICIT_DEF_GPR
:
133 case PPC::IMPLICIT_DEF_F8
:
134 case PPC::IMPLICIT_DEF_F4
:
135 case PPC::IMPLICIT_DEF_VRRC
:
136 break; // pseudo opcode, no side effects
137 case PPC::MovePCtoLR
:
138 assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
144 static unsigned enumRegToMachineReg(unsigned enumReg
) {
146 case PPC::R0
: case PPC::F0
: case PPC::V0
: case PPC::CR0
: return 0;
147 case PPC::R1
: case PPC::F1
: case PPC::V1
: case PPC::CR1
: return 1;
148 case PPC::R2
: case PPC::F2
: case PPC::V2
: case PPC::CR2
: return 2;
149 case PPC::R3
: case PPC::F3
: case PPC::V3
: case PPC::CR3
: return 3;
150 case PPC::R4
: case PPC::F4
: case PPC::V4
: case PPC::CR4
: return 4;
151 case PPC::R5
: case PPC::F5
: case PPC::V5
: case PPC::CR5
: return 5;
152 case PPC::R6
: case PPC::F6
: case PPC::V6
: case PPC::CR6
: return 6;
153 case PPC::R7
: case PPC::F7
: case PPC::V7
: case PPC::CR7
: return 7;
154 case PPC::R8
: case PPC::F8
: case PPC::V8
: return 8;
155 case PPC::R9
: case PPC::F9
: case PPC::V9
: return 9;
156 case PPC::R10
: case PPC::F10
: case PPC::V10
: return 10;
157 case PPC::R11
: case PPC::F11
: case PPC::V11
: return 11;
158 case PPC::R12
: case PPC::F12
: case PPC::V12
: return 12;
159 case PPC::R13
: case PPC::F13
: case PPC::V13
: return 13;
160 case PPC::R14
: case PPC::F14
: case PPC::V14
: return 14;
161 case PPC::R15
: case PPC::F15
: case PPC::V15
: return 15;
162 case PPC::R16
: case PPC::F16
: case PPC::V16
: return 16;
163 case PPC::R17
: case PPC::F17
: case PPC::V17
: return 17;
164 case PPC::R18
: case PPC::F18
: case PPC::V18
: return 18;
165 case PPC::R19
: case PPC::F19
: case PPC::V19
: return 19;
166 case PPC::R20
: case PPC::F20
: case PPC::V20
: return 20;
167 case PPC::R21
: case PPC::F21
: case PPC::V21
: return 21;
168 case PPC::R22
: case PPC::F22
: case PPC::V22
: return 22;
169 case PPC::R23
: case PPC::F23
: case PPC::V23
: return 23;
170 case PPC::R24
: case PPC::F24
: case PPC::V24
: return 24;
171 case PPC::R25
: case PPC::F25
: case PPC::V25
: return 25;
172 case PPC::R26
: case PPC::F26
: case PPC::V26
: return 26;
173 case PPC::R27
: case PPC::F27
: case PPC::V27
: return 27;
174 case PPC::R28
: case PPC::F28
: case PPC::V28
: return 28;
175 case PPC::R29
: case PPC::F29
: case PPC::V29
: return 29;
176 case PPC::R30
: case PPC::F30
: case PPC::V30
: return 30;
177 case PPC::R31
: case PPC::F31
: case PPC::V31
: return 31;
179 std::cerr
<< "Unhandled reg in enumRegToRealReg!\n";
184 int PPCCodeEmitter::getMachineOpValue(MachineInstr
&MI
, MachineOperand
&MO
) {
186 int rv
= 0; // Return value; defaults to 0 for unhandled cases
187 // or things that get fixed up later by the JIT.
188 if (MO
.isRegister()) {
189 rv
= enumRegToMachineReg(MO
.getReg());
191 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
192 // register, not the register number directly.
193 if ((MI
.getOpcode() == PPC::MTCRF
|| MI
.getOpcode() == PPC::MFOCRF
) &&
194 (MO
.getReg() >= PPC::CR0
&& MO
.getReg() <= PPC::CR7
)) {
197 } else if (MO
.isImmediate()) {
198 rv
= MO
.getImmedValue();
199 } else if (MO
.isGlobalAddress() || MO
.isExternalSymbol()) {
200 bool isExternal
= MO
.isExternalSymbol() ||
201 MO
.getGlobal()->hasWeakLinkage() ||
202 MO
.getGlobal()->hasLinkOnceLinkage() ||
203 (MO
.getGlobal()->isExternal() &&
204 !MO
.getGlobal()->hasNotBeenReadFromBytecode());
206 if (MI
.getOpcode() == PPC::BL
)
207 Reloc
= PPC::reloc_pcrel_bx
;
209 switch (MI
.getOpcode()) {
210 default: MI
.dump(); assert(0 && "Unknown instruction for relocation!");
213 Reloc
= PPC::reloc_absolute_ptr_high
; // Pointer to stub
215 Reloc
= PPC::reloc_absolute_high
; // Pointer to symbol
218 assert(!isExternal
&& "Something in the ISEL changed\n");
219 Reloc
= PPC::reloc_absolute_low
;
233 Reloc
= PPC::reloc_absolute_ptr_low
;
235 Reloc
= PPC::reloc_absolute_low
;
239 if (MO
.isGlobalAddress())
240 MCE
.addRelocation(MachineRelocation(MCE
.getCurrentPCOffset(),
241 Reloc
, MO
.getGlobal(), 0));
243 MCE
.addRelocation(MachineRelocation(MCE
.getCurrentPCOffset(),
244 Reloc
, MO
.getSymbolName(), 0));
245 } else if (MO
.isMachineBasicBlock()) {
246 unsigned* CurrPC
= (unsigned*)(intptr_t)MCE
.getCurrentPCValue();
247 BBRefs
.push_back(std::make_pair(MO
.getMachineBasicBlock(), CurrPC
));
248 } else if (MO
.isConstantPoolIndex()) {
249 unsigned index
= MO
.getConstantPoolIndex();
250 unsigned Opcode
= MI
.getOpcode();
251 rv
= MCE
.getConstantPoolEntryAddress(index
);
252 if (Opcode
== PPC::LIS
|| Opcode
== PPC::ADDIS
) {
253 // lis wants hi16(addr)
254 if ((short)rv
< 0) rv
+= 1 << 16;
256 } else if (Opcode
== PPC::LWZ
|| Opcode
== PPC::LA
||
258 Opcode
== PPC::LFS
|| Opcode
== PPC::LFD
) {
259 // These load opcodes want lo16(addr)
262 assert(0 && "Unknown constant pool using instruction!");
265 std::cerr
<< "ERROR: Unknown type of MachineOperand: " << MO
<< "\n";
272 #include "PPCGenCodeEmitter.inc"