test/tools/llvm-mca/X86/Barcelona/dependency-breaking-sbb-1.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s
   3
   4 # Although both SBB are dependency breaking instructions, there is still an
   5 # implicit dependency on EFLAGS which limits the ILP. So, the hardware backend
   6 # can only execute one instruction per cycle.
   7
   8 sbb %edx, %edx
   9 sbb %eax, %eax
  10
  11 # CHECK:      Iterations:        1500
  12 # CHECK-NEXT: Instructions:      3000
  13 # CHECK-NEXT: Total Cycles:      6003
  14 # CHECK-NEXT: Total uOps:        6000
  15
  16 # CHECK:      Dispatch Width:    4
  17 # CHECK-NEXT: uOps Per Cycle:    1.00
  18 # CHECK-NEXT: IPC:               0.50
  19 # CHECK-NEXT: Block RThroughput: 1.0
  20
  21 # CHECK:      Instruction Info:
  22 # CHECK-NEXT: [1]: #uOps
  23 # CHECK-NEXT: [2]: Latency
  24 # CHECK-NEXT: [3]: RThroughput
  25 # CHECK-NEXT: [4]: MayLoad
  26 # CHECK-NEXT: [5]: MayStore
  27 # CHECK-NEXT: [6]: HasSideEffects (U)
  28
  29 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  30 # CHECK-NEXT:  2      2     0.67                        sbbl    %edx, %edx
  31 # CHECK-NEXT:  2      2     0.67                        sbbl    %eax, %eax
  32
  33 # CHECK:      Resources:
  34 # CHECK-NEXT: [0]   - SBDivider
  35 # CHECK-NEXT: [1]   - SBFPDivider
  36 # CHECK-NEXT: [2]   - SBPort0
  37 # CHECK-NEXT: [3]   - SBPort1
  38 # CHECK-NEXT: [4]   - SBPort4
  39 # CHECK-NEXT: [5]   - SBPort5
  40 # CHECK-NEXT: [6.0] - SBPort23
  41 # CHECK-NEXT: [6.1] - SBPort23
  42
  43 # CHECK:      Resource pressure per iteration:
  44 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
  45 # CHECK-NEXT:  -      -     1.33   1.33    -     1.33    -      -
  46
  47 # CHECK:      Resource pressure by instruction:
  48 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
  49 # CHECK-NEXT:  -      -     0.67   0.67    -     0.67    -      -     sbbl      %edx, %edx
  50 # CHECK-NEXT:  -      -     0.67   0.67    -     0.67    -      -     sbbl      %eax, %eax
  51
  52 # CHECK:      Timeline view:
  53 # CHECK-NEXT:                     01234
  54 # CHECK-NEXT: Index     0123456789
  55
  56 # CHECK:      [0,0]     DeeER.    .   .   sbbl  %edx, %edx
  57 # CHECK-NEXT: [0,1]     D==eeER   .   .   sbbl  %eax, %eax
  58 # CHECK-NEXT: [1,0]     .D===eeER .   .   sbbl  %edx, %edx
  59 # CHECK-NEXT: [1,1]     .D=====eeER   .   sbbl  %eax, %eax
  60 # CHECK-NEXT: [2,0]     . D======eeER .   sbbl  %edx, %edx
  61 # CHECK-NEXT: [2,1]     . D========eeER   sbbl  %eax, %eax
  62
  63 # CHECK:      Average Wait times (based on the timeline view):
  64 # CHECK-NEXT: [0]: Executions
  65 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
  66 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
  67 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
  68
  69 # CHECK:            [0]    [1]    [2]    [3]
  70 # CHECK-NEXT: 0.     3     4.0    0.3    0.0       sbbl %edx, %edx
  71 # CHECK-NEXT: 1.     3     6.0    0.0    0.0       sbbl %eax, %eax