Recommit "rL366894: [yaml2obj] - Allow custom fields for the SHT_UNDEF sections."
[llvm-complete.git] / test / tools / llvm-mca / X86 / BtVer2 / dependency-breaking-sbb-2.s
blobe121941298ae8b7ddb6c6055ad83106244ce70c1
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -timeline -timeline-max-iterations=3 -iterations=1500 < %s | FileCheck %s
4 # perf stat reports a throughput of 1.51 IPC for this block of code.
6 # The SBB does not depend on the value of register EAX. That means, it doesn't
7 # have to wait for the IMUL to write-back on EAX. However, it still depends on
8 # the ADD for EFLAGS.
10 imul %edx, %eax
11 add %edx, %edx
12 sbb %eax, %eax
14 # CHECK: Iterations: 1500
15 # CHECK-NEXT: Instructions: 4500
16 # CHECK-NEXT: Total Cycles: 3007
17 # CHECK-NEXT: Total uOps: 6000
19 # CHECK: Dispatch Width: 2
20 # CHECK-NEXT: uOps Per Cycle: 2.00
21 # CHECK-NEXT: IPC: 1.50
22 # CHECK-NEXT: Block RThroughput: 2.0
24 # CHECK: Instruction Info:
25 # CHECK-NEXT: [1]: #uOps
26 # CHECK-NEXT: [2]: Latency
27 # CHECK-NEXT: [3]: RThroughput
28 # CHECK-NEXT: [4]: MayLoad
29 # CHECK-NEXT: [5]: MayStore
30 # CHECK-NEXT: [6]: HasSideEffects (U)
32 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
33 # CHECK-NEXT: 2 3 1.00 imull %edx, %eax
34 # CHECK-NEXT: 1 1 0.50 addl %edx, %edx
35 # CHECK-NEXT: 1 1 1.00 sbbl %eax, %eax
37 # CHECK: Resources:
38 # CHECK-NEXT: [0] - JALU0
39 # CHECK-NEXT: [1] - JALU1
40 # CHECK-NEXT: [2] - JDiv
41 # CHECK-NEXT: [3] - JFPA
42 # CHECK-NEXT: [4] - JFPM
43 # CHECK-NEXT: [5] - JFPU0
44 # CHECK-NEXT: [6] - JFPU1
45 # CHECK-NEXT: [7] - JLAGU
46 # CHECK-NEXT: [8] - JMul
47 # CHECK-NEXT: [9] - JSAGU
48 # CHECK-NEXT: [10] - JSTC
49 # CHECK-NEXT: [11] - JVALU0
50 # CHECK-NEXT: [12] - JVALU1
51 # CHECK-NEXT: [13] - JVIMUL
53 # CHECK: Resource pressure per iteration:
54 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
55 # CHECK-NEXT: 2.00 2.00 - - - - - - 1.00 - - - - -
57 # CHECK: Resource pressure by instruction:
58 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions:
59 # CHECK-NEXT: - 1.00 - - - - - - 1.00 - - - - - imull %edx, %eax
60 # CHECK-NEXT: - 1.00 - - - - - - - - - - - - addl %edx, %edx
61 # CHECK-NEXT: 2.00 - - - - - - - - - - - - - sbbl %eax, %eax
63 # CHECK: Timeline view:
64 # CHECK-NEXT: 01
65 # CHECK-NEXT: Index 0123456789
67 # CHECK: [0,0] DeeeER .. imull %edx, %eax
68 # CHECK-NEXT: [0,1] .DeE-R .. addl %edx, %edx
69 # CHECK-NEXT: [0,2] .D=eE-R .. sbbl %eax, %eax
70 # CHECK-NEXT: [1,0] . D==eeeER.. imull %edx, %eax
71 # CHECK-NEXT: [1,1] . DeE---R.. addl %edx, %edx
72 # CHECK-NEXT: [1,2] . D=eE---R. sbbl %eax, %eax
73 # CHECK-NEXT: [2,0] . D=eeeER. imull %edx, %eax
74 # CHECK-NEXT: [2,1] . D=eE--R addl %edx, %edx
75 # CHECK-NEXT: [2,2] . D==eE-R sbbl %eax, %eax
77 # CHECK: Average Wait times (based on the timeline view):
78 # CHECK-NEXT: [0]: Executions
79 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
80 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
81 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
83 # CHECK: [0] [1] [2] [3]
84 # CHECK-NEXT: 0. 3 2.0 0.7 0.0 imull %edx, %eax
85 # CHECK-NEXT: 1. 3 1.3 1.3 2.0 addl %edx, %edx
86 # CHECK-NEXT: 2. 3 2.3 0.0 1.7 sbbl %eax, %eax