test/tools/llvm-mca/X86/llvm-mca-markers-5.s

   1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
   2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false < %s | FileCheck %s
   3
   4   add %ecx, %esi
   5 # LLVM-MCA-BEGIN First Region
   6   add %edi, %esi
   7 # LLVM-MCA-END
   8 # LLVM-MCA-BEGIN Second Region
   9   add %esi, %edx
  10 # LLVM-MCA-END
  11 # LLVM-MCA-BEGIN Third Region
  12   add %edx, %eax
  13 # LLVM-MCA-END
  14   add %esi, %eax
  15
  16 # CHECK:      [0] Code Region - First Region
  17
  18 # CHECK:      Iterations:        1
  19 # CHECK-NEXT: Instructions:      1
  20 # CHECK-NEXT: Total Cycles:      4
  21 # CHECK-NEXT: Total uOps:        1
  22
  23 # CHECK:      Dispatch Width:    2
  24 # CHECK-NEXT: uOps Per Cycle:    0.25
  25 # CHECK-NEXT: IPC:               0.25
  26 # CHECK-NEXT: Block RThroughput: 0.5
  27
  28 # CHECK:      Instruction Info:
  29 # CHECK-NEXT: [1]: #uOps
  30 # CHECK-NEXT: [2]: Latency
  31 # CHECK-NEXT: [3]: RThroughput
  32 # CHECK-NEXT: [4]: MayLoad
  33 # CHECK-NEXT: [5]: MayStore
  34 # CHECK-NEXT: [6]: HasSideEffects (U)
  35
  36 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  37 # CHECK-NEXT:  1      1     0.50                        addl    %edi, %esi
  38
  39 # CHECK:      [1] Code Region - Second Region
  40
  41 # CHECK:      Iterations:        1
  42 # CHECK-NEXT: Instructions:      1
  43 # CHECK-NEXT: Total Cycles:      4
  44 # CHECK-NEXT: Total uOps:        1
  45
  46 # CHECK:      Dispatch Width:    2
  47 # CHECK-NEXT: uOps Per Cycle:    0.25
  48 # CHECK-NEXT: IPC:               0.25
  49 # CHECK-NEXT: Block RThroughput: 0.5
  50
  51 # CHECK:      Instruction Info:
  52 # CHECK-NEXT: [1]: #uOps
  53 # CHECK-NEXT: [2]: Latency
  54 # CHECK-NEXT: [3]: RThroughput
  55 # CHECK-NEXT: [4]: MayLoad
  56 # CHECK-NEXT: [5]: MayStore
  57 # CHECK-NEXT: [6]: HasSideEffects (U)
  58
  59 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  60 # CHECK-NEXT:  1      1     0.50                        addl    %esi, %edx
  61
  62 # CHECK:      [2] Code Region - Third Region
  63
  64 # CHECK:      Iterations:        1
  65 # CHECK-NEXT: Instructions:      1
  66 # CHECK-NEXT: Total Cycles:      4
  67 # CHECK-NEXT: Total uOps:        1
  68
  69 # CHECK:      Dispatch Width:    2
  70 # CHECK-NEXT: uOps Per Cycle:    0.25
  71 # CHECK-NEXT: IPC:               0.25
  72 # CHECK-NEXT: Block RThroughput: 0.5
  73
  74 # CHECK:      Instruction Info:
  75 # CHECK-NEXT: [1]: #uOps
  76 # CHECK-NEXT: [2]: Latency
  77 # CHECK-NEXT: [3]: RThroughput
  78 # CHECK-NEXT: [4]: MayLoad
  79 # CHECK-NEXT: [5]: MayStore
  80 # CHECK-NEXT: [6]: HasSideEffects (U)
  81
  82 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
  83 # CHECK-NEXT:  1      1     0.50                        addl    %edx, %eax