| blob | 94c47c6f62ca1aef9922a541f1d540bbe0dc1e19 |
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s
3 # FIXME: Remove -global-isel-abort=0 when G_TRUNC legality handled
5 ---
6 name: test_sext_trunc_v2s32_to_v2s16_to_v2s32
7 body: |
8 bb.0:
9 liveins: $vgpr0_vgpr1
11 ; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s16_to_v2s32
12 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
13 ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY [[COPY]](<2 x s32>)
14 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
15 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>)
16 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UV]], [[C]](s32)
17 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[UV1]], [[C]](s32)
18 ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
19 ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
20 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ASHR]](s32), [[ASHR1]](s32)
21 ; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
22 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
23 %1:_(<2 x s16>) = G_TRUNC %0
24 %2:_(<2 x s32>) = G_SEXT %1
25 $vgpr0_vgpr1 = COPY %2
26 ...
28 ---
29 name: test_sext_trunc_v2s32_to_v2s16_to_v2s64
30 body: |
31 bb.0:
32 liveins: $vgpr0_vgpr1
34 ; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s16_to_v2s64
35 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
36 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
37 ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32)
38 ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32)
39 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
40 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
41 ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ANYEXT]], [[TRUNC]](s32)
42 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
43 ; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ANYEXT1]], [[TRUNC1]](s32)
44 ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
45 ; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[TRUNC2]](s32)
46 ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[C]](s64)
47 ; CHECK: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[SHL1]], [[TRUNC3]](s32)
48 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ASHR]](s64), [[ASHR1]](s64)
49 ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
50 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
51 %1:_(<2 x s16>) = G_TRUNC %0
52 %2:_(<2 x s64>) = G_SEXT %1
53 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
54 ...
56 ---
57 name: test_sext_trunc_v2s32_to_v2s8_to_v2s16
58 body: |
59 bb.0:
60 liveins: $vgpr0_vgpr1
62 ; The G_SEXT_INREG doesn't lower here because G_TRUNC is both illegal and
63 ; unable to legalize. This prevents further legalization.
64 ; CHECK-LABEL: name: test_sext_trunc_v2s32_to_v2s8_to_v2s16
65 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
66 ; CHECK: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[COPY]](<2 x s32>)
67 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
68 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
69 ; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[TRUNC]](<2 x s16>)
70 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
71 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C1]](s32)
72 ; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
73 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[BITCAST]](s32)
74 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[ZEXT]](s32)
75 ; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[SHL]](s32)
76 ; CHECK: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
77 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[LSHR]](s32)
78 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[ZEXT1]](s32)
79 ; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[SHL1]](s32)
80 ; CHECK: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
81 ; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC2]](s16)
82 ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT]], [[ZEXT2]](s32)
83 ; CHECK: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[ASHR]](s32)
84 ; CHECK: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC1]](s16)
85 ; CHECK: [[SEXT1:%[0-9]+]]:_(s32) = G_SEXT [[TRUNC3]](s16)
86 ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SEXT1]], [[ZEXT3]](s32)
87 ; CHECK: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[ASHR1]](s32)
88 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s16>) = G_BUILD_VECTOR [[TRUNC4]](s16), [[TRUNC5]](s16)
89 ; CHECK: $vgpr0 = COPY [[BUILD_VECTOR]](<2 x s16>)
90 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
91 %1:_(<2 x s8>) = G_TRUNC %0
92 %2:_(<2 x s16>) = G_SEXT %1
93 $vgpr0 = COPY %2
94 ...
96 ---
97 name: test_sext_trunc_v3s32_to_v3s16_to_v3s32
98 body: |
99 bb.0:
100 liveins: $vgpr0_vgpr1_vgpr2
102 ; CHECK-LABEL: name: test_sext_trunc_v3s32_to_v3s16_to_v3s32
103 ; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
104 ; CHECK: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY [[COPY]](<3 x s32>)
105 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
106 ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>)
107 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[UV]], [[C]](s32)
108 ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[UV1]], [[C]](s32)
109 ; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[UV2]], [[C]](s32)
110 ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
111 ; CHECK: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[SHL1]], [[C]](s32)
112 ; CHECK: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL2]], [[C]](s32)
113 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[ASHR]](s32), [[ASHR1]](s32), [[ASHR2]](s32)
114 ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>)
115 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
116 %1:_(<3 x s16>) = G_TRUNC %0
117 %2:_(<3 x s32>) = G_SEXT %1
118 $vgpr0_vgpr1_vgpr2 = COPY %2
119 ...