test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX6 %s
   3 # RUN: llc -march=amdgcn -mcpu=fiji -mattr=+wavefrontsize32,-wavefrontsize64  -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX8 %s
   4 # RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+wavefrontsize32,-wavefrontsize64  -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX9 %s
   5 # RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64  -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10-WAVE64 %s
   6 # RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64  -run-pass=instruction-select -verify-machineinstrs -o - %s  | FileCheck -check-prefix=GFX10-WAVE32 %s
   7
   8 ---
   9 name:  gep_p0_sgpr_sgpr
  10 legalized:       true
  11 regBankSelected: true
  12
  13 body: |
  14   bb.0:
  15     liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
  16     ; GFX6-LABEL: name: gep_p0_sgpr_sgpr
  17     ; GFX6: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  18     ; GFX6: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
  19     ; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  20     ; GFX6: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub0
  21     ; GFX6: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  22     ; GFX6: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1
  23     ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY2]], [[COPY3]], implicit-def $scc
  24     ; GFX6: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY4]], [[COPY5]], implicit-def $scc, implicit $scc
  25     ; GFX6: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
  26     ; GFX6: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
  27     ; GFX8-LABEL: name: gep_p0_sgpr_sgpr
  28     ; GFX8: $vcc_hi = IMPLICIT_DEF
  29     ; GFX8: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  30     ; GFX8: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
  31     ; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  32     ; GFX8: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub0
  33     ; GFX8: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  34     ; GFX8: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1
  35     ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY2]], [[COPY3]], implicit-def $scc
  36     ; GFX8: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY4]], [[COPY5]], implicit-def $scc, implicit $scc
  37     ; GFX8: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
  38     ; GFX8: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
  39     ; GFX9-LABEL: name: gep_p0_sgpr_sgpr
  40     ; GFX9: $vcc_hi = IMPLICIT_DEF
  41     ; GFX9: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  42     ; GFX9: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
  43     ; GFX9: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  44     ; GFX9: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub0
  45     ; GFX9: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  46     ; GFX9: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1
  47     ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY2]], [[COPY3]], implicit-def $scc
  48     ; GFX9: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY4]], [[COPY5]], implicit-def $scc, implicit $scc
  49     ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
  50     ; GFX9: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
  51     ; GFX10-WAVE64-LABEL: name: gep_p0_sgpr_sgpr
  52     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  53     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
  54     ; GFX10-WAVE64: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  55     ; GFX10-WAVE64: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub0
  56     ; GFX10-WAVE64: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  57     ; GFX10-WAVE64: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1
  58     ; GFX10-WAVE64: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY2]], [[COPY3]], implicit-def $scc
  59     ; GFX10-WAVE64: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY4]], [[COPY5]], implicit-def $scc, implicit $scc
  60     ; GFX10-WAVE64: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
  61     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
  62     ; GFX10-WAVE32-LABEL: name: gep_p0_sgpr_sgpr
  63     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
  64     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
  65     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $sgpr2_sgpr3
  66     ; GFX10-WAVE32: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
  67     ; GFX10-WAVE32: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub0
  68     ; GFX10-WAVE32: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
  69     ; GFX10-WAVE32: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1
  70     ; GFX10-WAVE32: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY2]], [[COPY3]], implicit-def $scc
  71     ; GFX10-WAVE32: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY4]], [[COPY5]], implicit-def $scc, implicit $scc
  72     ; GFX10-WAVE32: [[REG_SEQUENCE:%[0-9]+]]:sreg_64_xexec = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
  73     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
  74     %0:sgpr(p0) = COPY $sgpr0_sgpr1
  75     %1:sgpr(s64) = COPY $sgpr2_sgpr3
  76     %2:sgpr(p0) = G_GEP %0, %1
  77     S_ENDPGM 0, implicit %2
  78
  79 ...
  80
  81 ---
  82 name:  gep_p0_vgpr_vgpr
  83 legalized:       true
  84 regBankSelected: true
  85
  86 body: |
  87   bb.0:
  88     liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
  89     ; GFX6-LABEL: name: gep_p0_vgpr_vgpr
  90     ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
  91     ; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
  92     ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
  93     ; GFX6: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
  94     ; GFX6: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
  95     ; GFX6: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
  96     ; GFX6: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
  97     ; GFX6: %8:vgpr_32, dead %10:sreg_64_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
  98     ; GFX6: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
  99     ; GFX6: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 100     ; GFX8-LABEL: name: gep_p0_vgpr_vgpr
 101     ; GFX8: $vcc_hi = IMPLICIT_DEF
 102     ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 103     ; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
 104     ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 105     ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 106     ; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 107     ; GFX8: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 108     ; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 109     ; GFX8: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 110     ; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 111     ; GFX8: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 112     ; GFX9-LABEL: name: gep_p0_vgpr_vgpr
 113     ; GFX9: $vcc_hi = IMPLICIT_DEF
 114     ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 115     ; GFX9: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
 116     ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 117     ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 118     ; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 119     ; GFX9: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 120     ; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 121     ; GFX9: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 122     ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 123     ; GFX9: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 124     ; GFX10-WAVE64-LABEL: name: gep_p0_vgpr_vgpr
 125     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 126     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
 127     ; GFX10-WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 128     ; GFX10-WAVE64: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 129     ; GFX10-WAVE64: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 130     ; GFX10-WAVE64: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 131     ; GFX10-WAVE64: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 132     ; GFX10-WAVE64: %8:vgpr_32, dead %10:sreg_64_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 133     ; GFX10-WAVE64: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 134     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 135     ; GFX10-WAVE32-LABEL: name: gep_p0_vgpr_vgpr
 136     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 137     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 138     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
 139     ; GFX10-WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 140     ; GFX10-WAVE32: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 141     ; GFX10-WAVE32: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 142     ; GFX10-WAVE32: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 143     ; GFX10-WAVE32: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 144     ; GFX10-WAVE32: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 145     ; GFX10-WAVE32: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 146     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 147     %0:vgpr(p0) = COPY $vgpr0_vgpr1
 148     %1:vgpr(s64) = COPY $vgpr2_vgpr3
 149     %2:vgpr(p0) = G_GEP %0, %1
 150     S_ENDPGM 0, implicit %2
 151
 152 ...
 153
 154 ---
 155 name:  gep_p0_sgpr_vgpr
 156 legalized:       true
 157 regBankSelected: true
 158
 159 body: |
 160   bb.0:
 161     liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
 162     ; GFX6-LABEL: name: gep_p0_sgpr_vgpr
 163     ; GFX6: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 164     ; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 165     ; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 166     ; GFX6: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 167     ; GFX6: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 168     ; GFX6: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 169     ; GFX6: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 170     ; GFX6: %8:vgpr_32, dead %10:sreg_64_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 171     ; GFX6: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 172     ; GFX6: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 173     ; GFX8-LABEL: name: gep_p0_sgpr_vgpr
 174     ; GFX8: $vcc_hi = IMPLICIT_DEF
 175     ; GFX8: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 176     ; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 177     ; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 178     ; GFX8: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 179     ; GFX8: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 180     ; GFX8: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 181     ; GFX8: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 182     ; GFX8: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 183     ; GFX8: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 184     ; GFX8: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 185     ; GFX9-LABEL: name: gep_p0_sgpr_vgpr
 186     ; GFX9: $vcc_hi = IMPLICIT_DEF
 187     ; GFX9: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 188     ; GFX9: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 189     ; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 190     ; GFX9: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 191     ; GFX9: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 192     ; GFX9: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 193     ; GFX9: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 194     ; GFX9: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 195     ; GFX9: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 196     ; GFX9: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 197     ; GFX10-WAVE64-LABEL: name: gep_p0_sgpr_vgpr
 198     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 199     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 200     ; GFX10-WAVE64: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 201     ; GFX10-WAVE64: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 202     ; GFX10-WAVE64: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 203     ; GFX10-WAVE64: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 204     ; GFX10-WAVE64: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 205     ; GFX10-WAVE64: %8:vgpr_32, dead %10:sreg_64_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 206     ; GFX10-WAVE64: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 207     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 208     ; GFX10-WAVE32-LABEL: name: gep_p0_sgpr_vgpr
 209     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 210     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
 211     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
 212     ; GFX10-WAVE32: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
 213     ; GFX10-WAVE32: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub0
 214     ; GFX10-WAVE32: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
 215     ; GFX10-WAVE32: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]].sub1
 216     ; GFX10-WAVE32: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY2]], [[COPY3]], 0, implicit $exec
 217     ; GFX10-WAVE32: %8:vgpr_32, dead %10:sreg_32_xm0_xexec = V_ADDC_U32_e64 [[COPY4]], [[COPY5]], killed [[V_ADD_I32_e64_1]], 0, implicit $exec
 218     ; GFX10-WAVE32: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_I32_e64_]], %subreg.sub0, %8, %subreg.sub1
 219     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
 220     %0:sgpr(p0) = COPY $sgpr0_sgpr1
 221     %1:vgpr(s64) = COPY $vgpr0_vgpr1
 222     %2:vgpr(p0) = G_GEP %0, %1
 223     S_ENDPGM 0, implicit %2
 224
 225 ...
 226
 227 ---
 228 name:  gep_p3_sgpr_sgpr
 229 legalized:       true
 230 regBankSelected: true
 231
 232 body: |
 233   bb.0:
 234     liveins: $sgpr0, $sgpr1
 235     ; GFX6-LABEL: name: gep_p3_sgpr_sgpr
 236     ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 237     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 238     ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 239     ; GFX6: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 240     ; GFX8-LABEL: name: gep_p3_sgpr_sgpr
 241     ; GFX8: $vcc_hi = IMPLICIT_DEF
 242     ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 243     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 244     ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 245     ; GFX8: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 246     ; GFX9-LABEL: name: gep_p3_sgpr_sgpr
 247     ; GFX9: $vcc_hi = IMPLICIT_DEF
 248     ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 249     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 250     ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 251     ; GFX9: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 252     ; GFX10-WAVE64-LABEL: name: gep_p3_sgpr_sgpr
 253     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 254     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 255     ; GFX10-WAVE64: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 256     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 257     ; GFX10-WAVE32-LABEL: name: gep_p3_sgpr_sgpr
 258     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 259     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 260     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 261     ; GFX10-WAVE32: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 262     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 263     %0:sgpr(p3) = COPY $sgpr0
 264     %1:sgpr(s32) = COPY $sgpr1
 265     %2:sgpr(p3) = G_GEP %0, %1
 266     S_ENDPGM 0, implicit %2
 267
 268 ...
 269
 270 ---
 271 name:  gep_p3_vgpr_vgpr
 272 legalized:       true
 273 regBankSelected: true
 274
 275 body: |
 276   bb.0:
 277     liveins: $vgpr0, $vgpr1
 278     ; GFX6-LABEL: name: gep_p3_vgpr_vgpr
 279     ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 280     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 281     ; GFX6: %2:vgpr_32, dead %3:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 282     ; GFX6: S_ENDPGM 0, implicit %2
 283     ; GFX8-LABEL: name: gep_p3_vgpr_vgpr
 284     ; GFX8: $vcc_hi = IMPLICIT_DEF
 285     ; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 286     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 287     ; GFX8: %2:vgpr_32, dead %3:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 288     ; GFX8: S_ENDPGM 0, implicit %2
 289     ; GFX9-LABEL: name: gep_p3_vgpr_vgpr
 290     ; GFX9: $vcc_hi = IMPLICIT_DEF
 291     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 292     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 293     ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 294     ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 295     ; GFX10-WAVE64-LABEL: name: gep_p3_vgpr_vgpr
 296     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 297     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 298     ; GFX10-WAVE64: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 299     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 300     ; GFX10-WAVE32-LABEL: name: gep_p3_vgpr_vgpr
 301     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 302     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 303     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
 304     ; GFX10-WAVE32: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 305     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 306     %0:vgpr(p3) = COPY $vgpr0
 307     %1:vgpr(s32) = COPY $vgpr1
 308     %2:vgpr(p3) = G_GEP %0, %1
 309     S_ENDPGM 0, implicit %2
 310
 311 ...
 312
 313 ---
 314 name:  gep_p3_sgpr_vgpr
 315 legalized:       true
 316 regBankSelected: true
 317
 318 body: |
 319   bb.0:
 320     liveins: $sgpr0, $vgpr0
 321     ; GFX6-LABEL: name: gep_p3_sgpr_vgpr
 322     ; GFX6: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
 323     ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 324     ; GFX6: %2:vgpr_32, dead %3:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 325     ; GFX6: S_ENDPGM 0, implicit %2
 326     ; GFX8-LABEL: name: gep_p3_sgpr_vgpr
 327     ; GFX8: $vcc_hi = IMPLICIT_DEF
 328     ; GFX8: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
 329     ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 330     ; GFX8: %2:vgpr_32, dead %3:sreg_32_xm0_xexec = V_ADD_I32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 331     ; GFX8: S_ENDPGM 0, implicit %2
 332     ; GFX9-LABEL: name: gep_p3_sgpr_vgpr
 333     ; GFX9: $vcc_hi = IMPLICIT_DEF
 334     ; GFX9: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
 335     ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 336     ; GFX9: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 337     ; GFX9: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 338     ; GFX10-WAVE64-LABEL: name: gep_p3_sgpr_vgpr
 339     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
 340     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 341     ; GFX10-WAVE64: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 342     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 343     ; GFX10-WAVE32-LABEL: name: gep_p3_sgpr_vgpr
 344     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 345     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
 346     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
 347     ; GFX10-WAVE32: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
 348     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[V_ADD_U32_e64_]]
 349     %0:sgpr(p3) = COPY $sgpr0
 350     %1:vgpr(s32) = COPY $vgpr0
 351     %2:vgpr(p3) = G_GEP %0, %1
 352     S_ENDPGM 0, implicit %2
 353
 354 ...
 355
 356 ---
 357 name:  gep_p6_sgpr_sgpr
 358 legalized:       true
 359 regBankSelected: true
 360
 361 body: |
 362   bb.0:
 363     liveins: $sgpr0, $sgpr1
 364     ; GFX6-LABEL: name: gep_p6_sgpr_sgpr
 365     ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 366     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 367     ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 368     ; GFX6: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 369     ; GFX8-LABEL: name: gep_p6_sgpr_sgpr
 370     ; GFX8: $vcc_hi = IMPLICIT_DEF
 371     ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 372     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 373     ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 374     ; GFX8: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 375     ; GFX9-LABEL: name: gep_p6_sgpr_sgpr
 376     ; GFX9: $vcc_hi = IMPLICIT_DEF
 377     ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 378     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 379     ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 380     ; GFX9: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 381     ; GFX10-WAVE64-LABEL: name: gep_p6_sgpr_sgpr
 382     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 383     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 384     ; GFX10-WAVE64: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 385     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 386     ; GFX10-WAVE32-LABEL: name: gep_p6_sgpr_sgpr
 387     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 388     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 389     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 390     ; GFX10-WAVE32: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 391     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 392     %0:sgpr(p6) = COPY $sgpr0
 393     %1:sgpr(s32) = COPY $sgpr1
 394     %2:sgpr(p6) = G_GEP %0, %1
 395     S_ENDPGM 0, implicit %2
 396
 397 ...
 398
 399 ---
 400 name:  gep_p2_sgpr_sgpr
 401 legalized:       true
 402 regBankSelected: true
 403
 404 body: |
 405   bb.0:
 406     liveins: $sgpr0, $sgpr1
 407     ; GFX6-LABEL: name: gep_p2_sgpr_sgpr
 408     ; GFX6: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 409     ; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 410     ; GFX6: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 411     ; GFX6: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 412     ; GFX8-LABEL: name: gep_p2_sgpr_sgpr
 413     ; GFX8: $vcc_hi = IMPLICIT_DEF
 414     ; GFX8: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 415     ; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 416     ; GFX8: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 417     ; GFX8: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 418     ; GFX9-LABEL: name: gep_p2_sgpr_sgpr
 419     ; GFX9: $vcc_hi = IMPLICIT_DEF
 420     ; GFX9: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 421     ; GFX9: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 422     ; GFX9: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 423     ; GFX9: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 424     ; GFX10-WAVE64-LABEL: name: gep_p2_sgpr_sgpr
 425     ; GFX10-WAVE64: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 426     ; GFX10-WAVE64: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 427     ; GFX10-WAVE64: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 428     ; GFX10-WAVE64: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 429     ; GFX10-WAVE32-LABEL: name: gep_p2_sgpr_sgpr
 430     ; GFX10-WAVE32: $vcc_hi = IMPLICIT_DEF
 431     ; GFX10-WAVE32: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
 432     ; GFX10-WAVE32: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
 433     ; GFX10-WAVE32: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY1]], implicit-def $scc
 434     ; GFX10-WAVE32: S_ENDPGM 0, implicit [[S_ADD_U32_]]
 435     %0:sgpr(p2) = COPY $sgpr0
 436     %1:sgpr(s32) = COPY $sgpr1
 437     %2:sgpr(p2) = G_GEP %0, %1
 438     S_ENDPGM 0, implicit %2
 439
 440 ...