test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir

   1 # RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
   2
   3 # GCN-LABEL: name: vmem_write_sgpr
   4 # GCN:      BUFFER_LOAD_DWORD_OFFEN
   5 # GCN-NEXT: V_NOP
   6 # GCN-NEXT: S_MOV_B32
   7 ---
   8 name:            vmem_write_sgpr
   9 body:             |
  10   bb.0:
  11     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  12     $sgpr4 = IMPLICIT_DEF
  13     $vgpr0 = IMPLICIT_DEF
  14     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  15     $sgpr0 = S_MOV_B32 0
  16 ...
  17 # GCN-LABEL: name: vmem_smem_write_sgpr
  18 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  19 # GCN-NEXT: V_NOP
  20 # GCN-NEXT: S_LOAD_DWORD_IMM
  21 ---
  22 name:            vmem_smem_write_sgpr
  23 body:             |
  24   bb.0:
  25     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  26     $sgpr4 = IMPLICIT_DEF
  27     $vgpr0 = IMPLICIT_DEF
  28     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  29     $sgpr0 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0
  30 ...
  31 # GCN-LABEL: name: vmem_snop_write_sgpr
  32 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  33 # GCN-NEXT: S_NOP
  34 # GCN-NEXT: V_NOP
  35 # GCN-NEXT: S_MOV_B32
  36 ---
  37 name:            vmem_snop_write_sgpr
  38 body:             |
  39   bb.0:
  40     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  41     $sgpr4 = IMPLICIT_DEF
  42     $vgpr0 = IMPLICIT_DEF
  43     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  44     S_NOP 0
  45     $sgpr0 = S_MOV_B32 0
  46 ...
  47 # GCN-LABEL: name: vmem_valu_write_sgpr
  48 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  49 # GCN-NEXT: V_ADD_F32
  50 # GCN-NEXT: S_MOV_B32
  51 ---
  52 name:            vmem_valu_write_sgpr
  53 body:             |
  54   bb.0:
  55     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  56     $sgpr4 = IMPLICIT_DEF
  57     $vgpr0 = IMPLICIT_DEF
  58     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  59     $vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $exec
  60     $sgpr0 = S_MOV_B32 0
  61 ...
  62 # GCN-LABEL: name: vmem_swait0_write_sgpr
  63 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  64 # GCN-NEXT: S_WAITCNT
  65 # GCN-NEXT: S_MOV_B32
  66 ---
  67 name:            vmem_swait0_write_sgpr
  68 body:             |
  69   bb.0:
  70     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  71     $sgpr4 = IMPLICIT_DEF
  72     $vgpr0 = IMPLICIT_DEF
  73     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  74     S_WAITCNT 0
  75     $sgpr0 = S_MOV_B32 0
  76 ...
  77 # GCN-LABEL: name: vmem_swait_any_write_sgpr
  78 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  79 # GCN-NEXT: S_WAITCNT
  80 # GCN-NEXT: V_NOP
  81 # GCN-NEXT: S_MOV_B32
  82 ---
  83 name:            vmem_swait_any_write_sgpr
  84 body:             |
  85   bb.0:
  86     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
  87     $sgpr4 = IMPLICIT_DEF
  88     $vgpr0 = IMPLICIT_DEF
  89     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
  90     S_WAITCNT 1
  91     $sgpr0 = S_MOV_B32 0
  92 ...
  93 # GCN-LABEL: name: vmem_write_exec_impread
  94 # GCN:      BUFFER_LOAD_DWORD_OFFEN
  95 # GCN:      V_NOP
  96 # GCN-NEXT: S_MOV_B64
  97 ---
  98 name:            vmem_write_exec_impread
  99 body:             |
 100   bb.0:
 101     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 102     $sgpr4 = IMPLICIT_DEF
 103     $vgpr0 = IMPLICIT_DEF
 104     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
 105     $exec = S_MOV_B64 7
 106 ...
 107 # GCN-LABEL: name: vmem_write_exec_expread
 108 # GCN:      BUFFER_LOAD_DWORD_OFFEN
 109 # GCN-NEXT: V_NOP
 110 # GCN-NEXT: S_MOV_B64
 111 ---
 112 name:            vmem_write_exec_expread
 113 body:             |
 114   bb.0:
 115     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 116     $vgpr0 = IMPLICIT_DEF
 117     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $exec_lo, 0, 0, 0, 0, 0, implicit $exec
 118     $exec = S_MOV_B64 7
 119 ...
 120 # GCN-LABEL: name: ds_write_m0
 121 # GCN:      DS_READ_B32
 122 # GCN-NEXT: V_NOP
 123 # GCN-NEXT: S_MOV_B32
 124 ---
 125 name:            ds_write_m0
 126 body:             |
 127   bb.0:
 128     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 129     $sgpr4 = IMPLICIT_DEF
 130     $vgpr0 = IMPLICIT_DEF
 131     $vgpr1 = DS_READ_B32 $vgpr0, 0, 0, implicit $m0, implicit $exec
 132     $m0 = S_MOV_B32 7
 133 ...
 134 # GCN-LABEL: name: vmem_write_sgpr_fall_through
 135 # GCN:      BUFFER_LOAD_DWORD_OFFEN
 136 # GCN:      V_NOP
 137 # GCN-NEXT: S_MOV_B32
 138 ---
 139 name:            vmem_write_sgpr_fall_through
 140 body:             |
 141   bb.0:
 142     successors: %bb.1
 143     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 144     $sgpr4 = IMPLICIT_DEF
 145     $vgpr0 = IMPLICIT_DEF
 146     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
 147
 148   bb.1:
 149     $sgpr0 = S_MOV_B32 0
 150 ...
 151 # GCN-LABEL: name: vmem_write_sgpr_branch
 152 # GCN:      BUFFER_LOAD_DWORD_OFFEN
 153 # GCN-NEXT: S_BRANCH
 154 # GCN:      V_NOP
 155 # GCN-NEXT: S_MOV_B32
 156 ---
 157 name:            vmem_write_sgpr_branch
 158 body:             |
 159   bb.0:
 160     successors: %bb.1
 161     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 162     $sgpr4 = IMPLICIT_DEF
 163     $vgpr0 = IMPLICIT_DEF
 164     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
 165     S_BRANCH %bb.1
 166
 167   bb.1:
 168     $sgpr0 = S_MOV_B32 0
 169 ...
 170 # GCN-LABEL: name: vmem_write_sgpr_branch_around
 171 # GCN:      BUFFER_LOAD_DWORD_OFFEN
 172 # GCN-NEXT: S_BRANCH
 173 # GCN:      bb.2:
 174 # GCN-NEXT: V_NOP
 175 # GCN-NEXT: S_MOV_B32
 176 ---
 177 name:            vmem_write_sgpr_branch_around
 178 body:             |
 179   bb.0:
 180     successors: %bb.2
 181     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 182     $sgpr4 = IMPLICIT_DEF
 183     $vgpr0 = IMPLICIT_DEF
 184     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
 185     S_BRANCH %bb.2
 186
 187   bb.1:
 188     successors: %bb.2
 189     S_WAITCNT 0
 190
 191   bb.2:
 192     $sgpr0 = S_MOV_B32 0
 193 ...
 194 # GCN-LABEL: name: vmem_write_sgpr_branch_backedge
 195 # GCN:      $vgpr0 = IMPLICIT_DEF
 196 # GCN-NEXT: V_NOP
 197 # GCN-NEXT: S_MOV_B32
 198 ---
 199 name:            vmem_write_sgpr_branch_backedge
 200 body:             |
 201   bb.0:
 202     successors: %bb.1
 203     $sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
 204     $sgpr4 = IMPLICIT_DEF
 205     $vgpr0 = IMPLICIT_DEF
 206     $sgpr0 = S_MOV_B32 0
 207
 208   bb.1:
 209     $vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, 0, implicit $exec
 210     S_BRANCH %bb.0
 211 ...
 212 # GCN-LABEL: name: ds_write_exec
 213 # GCN:      DS_WRITE_B32_gfx9
 214 # GCN-NEXT: V_NOP
 215 # GCN-NEXT: S_MOV_B32
 216 ---
 217 name:            ds_write_exec
 218 body:             |
 219   bb.0:
 220     $vgpr0 = IMPLICIT_DEF
 221     $vgpr1 = IMPLICIT_DEF
 222     DS_WRITE_B32_gfx9 $vgpr0, $vgpr1, 0, 0, implicit $exec
 223     $exec_lo = S_MOV_B32 -1
 224 ...