test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt

   1 # RUN: llvm-mc -arch=amdgcn -mcpu=gfx908 -disassemble -show-encoding < %s | FileCheck %s
   2
   3 # CHECK: v_dot2c_f32_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x6e]
   4 0x01,0x05,0x0a,0x6e
   5
   6 # CHECK: v_dot2c_f32_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x6f]
   7 0x01,0x05,0xfe,0x6f
   8
   9 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x00]
  10 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x00
  11
  12 # CHECK: v_dot2c_f32_f16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x6f,0x01,0xe4,0x00,0x00]
  13 0xfa,0x04,0xfe,0x6f,0x01,0xe4,0x00,0x00
  14
  15 # CHECK: v_dot2c_f32_f16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0xff,0xe4,0x00,0x00]
  16 0xfa,0x04,0x0a,0x6e,0xff,0xe4,0x00,0x00
  17
  18 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x6e,0x01,0xe4,0x00,0x00]
  19 0xfa,0xfe,0x0b,0x6e,0x01,0xe4,0x00,0x00
  20
  21 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x1b,0x00,0x00]
  22 0xfa,0x04,0x0a,0x6e,0x01,0x1b,0x00,0x00
  23
  24 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x40,0x01,0x00]
  25 0xfa,0x04,0x0a,0x6e,0x01,0x40,0x01,0x00
  26
  27 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x41,0x01,0x00]
  28 0xfa,0x04,0x0a,0x6e,0x01,0x41,0x01,0x00
  29
  30 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x42,0x01,0x00]
  31 0xfa,0x04,0x0a,0x6e,0x01,0x42,0x01,0x00
  32
  33 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x43,0x01,0x00]
  34 0xfa,0x04,0x0a,0x6e,0x01,0x43,0x01,0x00
  35
  36 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x30,0x01,0x00]
  37 0xfa,0x04,0x0a,0x6e,0x01,0x30,0x01,0x00
  38
  39 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x34,0x01,0x00]
  40 0xfa,0x04,0x0a,0x6e,0x01,0x34,0x01,0x00
  41
  42 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x38,0x01,0x00]
  43 0xfa,0x04,0x0a,0x6e,0x01,0x38,0x01,0x00
  44
  45 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x3c,0x01,0x00]
  46 0xfa,0x04,0x0a,0x6e,0x01,0x3c,0x01,0x00
  47
  48 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x01,0x01,0x00]
  49 0xfa,0x04,0x0a,0x6e,0x01,0x01,0x01,0x00
  50
  51 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x0f,0x01,0x00]
  52 0xfa,0x04,0x0a,0x6e,0x01,0x0f,0x01,0x00
  53
  54 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x11,0x01,0x00]
  55 0xfa,0x04,0x0a,0x6e,0x01,0x11,0x01,0x00
  56
  57 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x1f,0x01,0x00]
  58 0xfa,0x04,0x0a,0x6e,0x01,0x1f,0x01,0x00
  59
  60 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x21,0x01,0x00]
  61 0xfa,0x04,0x0a,0x6e,0x01,0x21,0x01,0x00
  62
  63 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0x2f,0x01,0x00]
  64 0xfa,0x04,0x0a,0x6e,0x01,0x2f,0x01,0x00
  65
  66 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x10]
  67 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x10
  68
  69 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x30]
  70 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x30
  71
  72 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0xf0]
  73 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0xf0
  74
  75 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x01]
  76 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x01
  77
  78 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x03]
  79 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x03
  80
  81 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x0f]
  82 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x00,0x0f
  83
  84 # CHECK: v_dot2c_f32_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x08,0x00]
  85 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x08,0x00
  86
  87 # CHECK: v_dot2c_f32_f16_dpp v5, -v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x10,0x00]
  88 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x10,0x00
  89
  90 # CHECK: v_dot2c_f32_f16_dpp v5, |v1|, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x20,0x00]
  91 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x20,0x00
  92
  93 # CHECK: v_dot2c_f32_f16_dpp v5, v1, -v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x40,0x00]
  94 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x40,0x00
  95
  96 # CHECK: v_dot2c_f32_f16_dpp v5, v1, |v2| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x80,0x00]
  97 0xfa,0x04,0x0a,0x6e,0x01,0xe4,0x80,0x00
  98
  99 # CHECK: v_dot2c_i32_i16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x70]
 100 0x01,0x05,0x0a,0x70
 101
 102 # CHECK: v_dot2c_i32_i16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x71]
 103 0x01,0x05,0xfe,0x71
 104
 105 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x00]
 106 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x00
 107
 108 # CHECK: v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x71,0x01,0xe4,0x00,0x00]
 109 0xfa,0x04,0xfe,0x71,0x01,0xe4,0x00,0x00
 110
 111 # CHECK: v_dot2c_i32_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0xff,0xe4,0x00,0x00]
 112 0xfa,0x04,0x0a,0x70,0xff,0xe4,0x00,0x00
 113
 114 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x70,0x01,0xe4,0x00,0x00]
 115 0xfa,0xfe,0x0b,0x70,0x01,0xe4,0x00,0x00
 116
 117 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x1b,0x00,0x00]
 118 0xfa,0x04,0x0a,0x70,0x01,0x1b,0x00,0x00
 119
 120 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x40,0x01,0x00]
 121 0xfa,0x04,0x0a,0x70,0x01,0x40,0x01,0x00
 122
 123 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x41,0x01,0x00]
 124 0xfa,0x04,0x0a,0x70,0x01,0x41,0x01,0x00
 125
 126 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x42,0x01,0x00]
 127 0xfa,0x04,0x0a,0x70,0x01,0x42,0x01,0x00
 128
 129 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x43,0x01,0x00]
 130 0xfa,0x04,0x0a,0x70,0x01,0x43,0x01,0x00
 131
 132 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x30,0x01,0x00]
 133 0xfa,0x04,0x0a,0x70,0x01,0x30,0x01,0x00
 134
 135 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x34,0x01,0x00]
 136 0xfa,0x04,0x0a,0x70,0x01,0x34,0x01,0x00
 137
 138 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x38,0x01,0x00]
 139 0xfa,0x04,0x0a,0x70,0x01,0x38,0x01,0x00
 140
 141 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x3c,0x01,0x00]
 142 0xfa,0x04,0x0a,0x70,0x01,0x3c,0x01,0x00
 143
 144 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x01,0x01,0x00]
 145 0xfa,0x04,0x0a,0x70,0x01,0x01,0x01,0x00
 146
 147 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x0f,0x01,0x00]
 148 0xfa,0x04,0x0a,0x70,0x01,0x0f,0x01,0x00
 149
 150 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x11,0x01,0x00]
 151 0xfa,0x04,0x0a,0x70,0x01,0x11,0x01,0x00
 152
 153 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x1f,0x01,0x00]
 154 0xfa,0x04,0x0a,0x70,0x01,0x1f,0x01,0x00
 155
 156 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x21,0x01,0x00]
 157 0xfa,0x04,0x0a,0x70,0x01,0x21,0x01,0x00
 158
 159 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0x2f,0x01,0x00]
 160 0xfa,0x04,0x0a,0x70,0x01,0x2f,0x01,0x00
 161
 162 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x10]
 163 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x10
 164
 165 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x30]
 166 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x30
 167
 168 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0xf0]
 169 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0xf0
 170
 171 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x01]
 172 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x01
 173
 174 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x03]
 175 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x03
 176
 177 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x0f]
 178 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x00,0x0f
 179
 180 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x70,0x01,0xe4,0x08,0x00]
 181 0xfa,0x04,0x0a,0x70,0x01,0xe4,0x08,0x00
 182
 183 # CHECK: v_dot4c_i32_i8_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x72]
 184 0x01,0x05,0x0a,0x72
 185
 186 # CHECK: v_dot4c_i32_i8_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x73]
 187 0x01,0x05,0xfe,0x73
 188
 189 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x00]
 190 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x00
 191
 192 # CHECK: v_dot4c_i32_i8_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x73,0x01,0xe4,0x00,0x00]
 193 0xfa,0x04,0xfe,0x73,0x01,0xe4,0x00,0x00
 194
 195 # CHECK: v_dot4c_i32_i8_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0xff,0xe4,0x00,0x00]
 196 0xfa,0x04,0x0a,0x72,0xff,0xe4,0x00,0x00
 197
 198 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x72,0x01,0xe4,0x00,0x00]
 199 0xfa,0xfe,0x0b,0x72,0x01,0xe4,0x00,0x00
 200
 201 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00]
 202 0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0x00
 203
 204 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0x00]
 205 0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0x00
 206
 207 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0x00]
 208 0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0x00
 209
 210 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x42,0x01,0x00]
 211 0xfa,0x04,0x0a,0x72,0x01,0x42,0x01,0x00
 212
 213 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x43,0x01,0x00]
 214 0xfa,0x04,0x0a,0x72,0x01,0x43,0x01,0x00
 215
 216 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x30,0x01,0x00]
 217 0xfa,0x04,0x0a,0x72,0x01,0x30,0x01,0x00
 218
 219 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x34,0x01,0x00]
 220 0xfa,0x04,0x0a,0x72,0x01,0x34,0x01,0x00
 221
 222 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x38,0x01,0x00]
 223 0xfa,0x04,0x0a,0x72,0x01,0x38,0x01,0x00
 224
 225 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x3c,0x01,0x00]
 226 0xfa,0x04,0x0a,0x72,0x01,0x3c,0x01,0x00
 227
 228 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0x00]
 229 0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0x00
 230
 231 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0x00]
 232 0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0x00
 233
 234 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0x00]
 235 0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0x00
 236
 237 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0x00]
 238 0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0x00
 239
 240 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0x00]
 241 0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0x00
 242
 243 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0x00]
 244 0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0x00
 245
 246 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x10]
 247 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x10
 248
 249 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x30]
 250 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x30
 251
 252 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xf0]
 253 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xf0
 254
 255 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x01]
 256 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x01
 257
 258 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x03]
 259 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x03
 260
 261 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x0f]
 262 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0x0f
 263
 264 # CHECK: v_dot4c_i32_i8_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x08,0x00]
 265 0xfa,0x04,0x0a,0x72,0x01,0xe4,0x08,0x00
 266
 267 # CHECK: v_dot8c_i32_i4_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x74]
 268 0x01,0x05,0x0a,0x74
 269
 270 # CHECK: v_dot8c_i32_i4_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x75]
 271 0x01,0x05,0xfe,0x75
 272
 273 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x00]
 274 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x00
 275
 276 # CHECK: v_dot8c_i32_i4_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0xfe,0x75,0x01,0xe4,0x00,0x00]
 277 0xfa,0x04,0xfe,0x75,0x01,0xe4,0x00,0x00
 278
 279 # CHECK: v_dot8c_i32_i4_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0xff,0xe4,0x00,0x00]
 280 0xfa,0x04,0x0a,0x74,0xff,0xe4,0x00,0x00
 281
 282 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0xfe,0x0b,0x74,0x01,0xe4,0x00,0x00]
 283 0xfa,0xfe,0x0b,0x74,0x01,0xe4,0x00,0x00
 284
 285 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00]
 286 0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0x00
 287
 288 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0x00]
 289 0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0x00
 290
 291 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0x00]
 292 0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0x00
 293
 294 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x42,0x01,0x00]
 295 0xfa,0x04,0x0a,0x74,0x01,0x42,0x01,0x00
 296
 297 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x43,0x01,0x00]
 298 0xfa,0x04,0x0a,0x74,0x01,0x43,0x01,0x00
 299
 300 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x30,0x01,0x00]
 301 0xfa,0x04,0x0a,0x74,0x01,0x30,0x01,0x00
 302
 303 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 wave_rol:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x34,0x01,0x00]
 304 0xfa,0x04,0x0a,0x74,0x01,0x34,0x01,0x00
 305
 306 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 wave_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x38,0x01,0x00]
 307 0xfa,0x04,0x0a,0x74,0x01,0x38,0x01,0x00
 308
 309 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 wave_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x3c,0x01,0x00]
 310 0xfa,0x04,0x0a,0x74,0x01,0x3c,0x01,0x00
 311
 312 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0x00]
 313 0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0x00
 314
 315 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_shl:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0x00]
 316 0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0x00
 317
 318 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_shr:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0x00]
 319 0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0x00
 320
 321 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_shr:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0x00]
 322 0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0x00
 323
 324 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_ror:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0x00]
 325 0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0x00
 326
 327 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 row_ror:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0x00]
 328 0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0x00
 329
 330 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x10]
 331 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x10
 332
 333 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x30]
 334 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x30
 335
 336 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xf0]
 337 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xf0
 338
 339 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x01]
 340 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x01
 341
 342 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x03]
 343 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x03
 344
 345 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x0f]
 346 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0x0f
 347
 348 # CHECK: v_dot8c_i32_i4_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0 ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x08,0x00]
 349 0xfa,0x04,0x0a,0x74,0x01,0xe4,0x08,0x00
 350
 351 # CHECK: v_pk_fmac_f16_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x78]
 352 0x01,0x05,0x0a,0x78
 353
 354 # CHECK: v_pk_fmac_f16_e32 v255, v1, v2 ; encoding: [0x01,0x05,0xfe,0x79]
 355 0x01,0x05,0xfe,0x79
 356
 357 # CHECK: v_pk_fmac_f16_e32 v5, v255, v2 ; encoding: [0xff,0x05,0x0a,0x78]
 358 0xff,0x05,0x0a,0x78
 359
 360 # CHECK: v_pk_fmac_f16_e32 v5, s1, v2 ; encoding: [0x01,0x04,0x0a,0x78]
 361 0x01,0x04,0x0a,0x78
 362
 363 # CHECK: v_pk_fmac_f16_e32 v5, vcc_lo, v2 ; encoding: [0x6a,0x04,0x0a,0x78]
 364 0x6a,0x04,0x0a,0x78
 365
 366 # CHECK: v_pk_fmac_f16_e32 v5, vcc_hi, v2 ; encoding: [0x6b,0x04,0x0a,0x78]
 367 0x6b,0x04,0x0a,0x78
 368
 369 # CHECK: v_pk_fmac_f16_e32 v5, ttmp11, v2 ; encoding: [0x77,0x04,0x0a,0x78]
 370 0x77,0x04,0x0a,0x78
 371
 372 # CHECK: v_pk_fmac_f16_e32 v5, m0, v2 ; encoding: [0x7c,0x04,0x0a,0x78]
 373 0x7c,0x04,0x0a,0x78
 374
 375 # CHECK: v_pk_fmac_f16_e32 v5, exec_lo, v2 ; encoding: [0x7e,0x04,0x0a,0x78]
 376 0x7e,0x04,0x0a,0x78
 377
 378 # CHECK: v_pk_fmac_f16_e32 v5, exec_hi, v2 ; encoding: [0x7f,0x04,0x0a,0x78]
 379 0x7f,0x04,0x0a,0x78
 380
 381 # CHECK: v_pk_fmac_f16_e32 v5, 0, v2 ; encoding: [0x80,0x04,0x0a,0x78]
 382 0x80,0x04,0x0a,0x78
 383
 384 # CHECK: v_pk_fmac_f16_e32 v5, -1, v2 ; encoding: [0xc1,0x04,0x0a,0x78]
 385 0xc1,0x04,0x0a,0x78
 386
 387 # CHECK: v_pk_fmac_f16_e32 v5, 0.5, v2 ; encoding: [0xf0,0x04,0x0a,0x78]
 388 0xf0,0x04,0x0a,0x78
 389
 390 # CHECK: v_pk_fmac_f16_e32 v5, -4.0, v2 ; encoding: [0xf7,0x04,0x0a,0x78]
 391 0xf7,0x04,0x0a,0x78
 392
 393 # CHECK: v_pk_fmac_f16_e32 v5, v1, v255 ; encoding: [0x01,0xff,0x0b,0x78]
 394 0x01,0xff,0x0b,0x78