lib/Target/ARM/ARM.td

   1 //===- ARM.td - Describe the ARM Target Machine -----------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the "Instituto Nokia de Tecnologia" and
   6 // is distributed under the University of Illinois Open Source
   7 // License. See LICENSE.TXT for details.
   8 //
   9 //===----------------------------------------------------------------------===//
  10 //
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 //===----------------------------------------------------------------------===//
  15 // Target-independent interfaces which we are implementing
  16 //===----------------------------------------------------------------------===//
  17
  18 include "../Target.td"
  19
  20 //===----------------------------------------------------------------------===//
  21 // ARM Subtarget features.
  22 //
  23
  24 def ArchV4T     : SubtargetFeature<"v4t", "ARMArchVersion", "V4T",
  25                                    "ARM v4T">;
  26 def ArchV5T     : SubtargetFeature<"v5t", "ARMArchVersion", "V5T",
  27                                    "ARM v5T">;
  28 def ArchV5TE    : SubtargetFeature<"v5te", "ARMArchVersion", "V5TE",
  29                                    "ARM v5TE, v5TEj, v5TExp">;
  30 def ArchV6      : SubtargetFeature<"v6", "ARMArchVersion", "V6",
  31                                    "ARM v6">;
  32 def FeatureVFP2 : SubtargetFeature<"vfp2", "HasVFP2", "true",
  33                                    "Enable VFP2 instructions ">;
  34
  35 //===----------------------------------------------------------------------===//
  36 // ARM Processors supported.
  37 //
  38
  39 class Proc<string Name, list<SubtargetFeature> Features>
  40  : Processor<Name, NoItineraries, Features>;
  41
  42 // V4 Processors.
  43 def : Proc<"generic",         []>;
  44 def : Proc<"arm8",            []>;
  45 def : Proc<"arm810",          []>;
  46 def : Proc<"strongarm",       []>;
  47 def : Proc<"strongarm110",    []>;
  48 def : Proc<"strongarm1100",   []>;
  49 def : Proc<"strongarm1110",   []>;
  50
  51 // V4T Processors.
  52 def : Proc<"arm7tdmi",        [ArchV4T]>;
  53 def : Proc<"arm7tdmi-s",      [ArchV4T]>;
  54 def : Proc<"arm710t",         [ArchV4T]>;
  55 def : Proc<"arm720t",         [ArchV4T]>;
  56 def : Proc<"arm9",            [ArchV4T]>;
  57 def : Proc<"arm9tdmi",        [ArchV4T]>;
  58 def : Proc<"arm920",          [ArchV4T]>;
  59 def : Proc<"arm920t",         [ArchV4T]>;
  60 def : Proc<"arm922t",         [ArchV4T]>;
  61 def : Proc<"arm940t",         [ArchV4T]>;
  62 def : Proc<"ep9312",          [ArchV4T]>;
  63
  64 // V5T Processors.
  65 def : Proc<"arm10tdmi",       [ArchV5T]>;
  66 def : Proc<"arm1020t",        [ArchV5T]>;
  67
  68 // V5TE Processors.
  69 def : Proc<"arm9e",           [ArchV5TE]>;
  70 def : Proc<"arm926ej-s",      [ArchV5TE]>;
  71 def : Proc<"arm946e-s",       [ArchV5TE]>;
  72 def : Proc<"arm966e-s",       [ArchV5TE]>;
  73 def : Proc<"arm968e-s",       [ArchV5TE]>;
  74 def : Proc<"arm10e",          [ArchV5TE]>;
  75 def : Proc<"arm1020e",        [ArchV5TE]>;
  76 def : Proc<"arm1022e",        [ArchV5TE]>;
  77 def : Proc<"xscale",          [ArchV5TE]>;
  78 def : Proc<"iwmmxt",          [ArchV5TE]>;
  79
  80 // V6 Processors.
  81 def : Proc<"arm1136j-s",      [ArchV6]>;
  82 def : Proc<"arm1136jf-s",     [ArchV6, FeatureVFP2]>;
  83 def : Proc<"arm1176jz-s",     [ArchV6]>;
  84 def : Proc<"arm1176jzf-s",    [ArchV6, FeatureVFP2]>;
  85 def : Proc<"mpcorenovfp",     [ArchV6]>;
  86 def : Proc<"mpcore",          [ArchV6, FeatureVFP2]>;
  87
  88 //===----------------------------------------------------------------------===//
  89 // Register File Description
  90 //===----------------------------------------------------------------------===//
  91
  92 include "ARMRegisterInfo.td"
  93
  94 //===----------------------------------------------------------------------===//
  95 // Instruction Descriptions
  96 //===----------------------------------------------------------------------===//
  97
  98 include "ARMInstrInfo.td"
  99
 100 def ARMInstrInfo : InstrInfo {
 101   // Define how we want to layout our target-specific information field.
 102   let TSFlagsFields = ["AddrModeBits",
 103                        "SizeFlag",
 104                        "IndexModeBits",
 105                        "Opcode",
 106                        "Form"];
 107   let TSFlagsShifts = [0,
 108                        4,
 109                        7,
 110                        9,
 111                        13];
 112 }
 113
 114 //===----------------------------------------------------------------------===//
 115 // Declare the target which we are implementing
 116 //===----------------------------------------------------------------------===//
 117
 118 def ARM : Target {
 119   // Pull in Instruction Info:
 120   let InstructionSet = ARMInstrInfo;
 121 }