lib/Target/ARM/ARMJITInfo.cpp

   1 //===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the Raul Herbster and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the JIT interfaces for the ARM target.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #define DEBUG_TYPE "jit"
  15 #include "ARMJITInfo.h"
  16 #include "ARMRelocations.h"
  17 #include "ARMSubtarget.h"
  18 #include "llvm/CodeGen/MachineCodeEmitter.h"
  19 #include "llvm/Config/alloca.h"
  20 #include <cstdlib>
  21 using namespace llvm;
  22
  23 void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
  24   abort();
  25 }
  26
  27 /// JITCompilerFunction - This contains the address of the JIT function used to
  28 /// compile a function lazily.
  29 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
  30
  31 // CompilationCallback stub - We can't use a C function with inline assembly in
  32 // it, because we the prolog/epilog inserted by GCC won't work for us.  Instead,
  33 // write our own wrapper, which does things our way, so we have complete control
  34 // over register saving and restoring.
  35 extern "C" {
  36 #if defined(__arm__)
  37   void ARMCompilationCallback(void);
  38   asm(
  39     ".text\n"
  40     ".align 2\n"
  41     ".globl ARMCompilationCallback\n"
  42     "ARMCompilationCallback:\n"
  43     // save main registers
  44     "mov    ip, sp\n"
  45     "stmfd  sp!, {fp, ip, lr, pc}\n"
  46     "sub    fp, ip, #4\n"
  47     // arguments to Compilation Callback
  48     // r0 - our lr (address of the call instruction in stub plus 4)
  49     // r1 - stub's lr (address of instruction that called the stub plus 4)
  50     "mov    r0, fp\n"  // stub's frame
  51     "mov    r1, lr\n"  // stub's lr
  52     "bl     ARMCompilationCallbackC\n"
  53     // restore main registers
  54     "ldmfd  sp, {fp, sp, pc}\n");
  55 #else // Not an ARM host
  56   void ARMCompilationCallback() {
  57     assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
  58     abort();
  59   }
  60 #endif
  61 }
  62
  63 /// ARMCompilationCallbackC - This is the target-specific function invoked by the
  64 /// function stub when we did not know the real target of a call.  This function
  65 /// must locate the start of the stub or call site and pass it into the JIT
  66 /// compiler function.
  67 extern "C" void ARMCompilationCallbackC(intptr_t *StackPtr, intptr_t RetAddr) {
  68   intptr_t *RetAddrLoc = &StackPtr[-1];
  69
  70   assert(*RetAddrLoc == RetAddr &&
  71          "Could not find return address on the stack!");
  72 #if 0
  73   DOUT << "In callback! Addr=" << (void*)RetAddr
  74        << " FP=" << (void*)StackPtr
  75        << ": Resolving call to function: "
  76        << TheVM->getFunctionReferencedName((void*)RetAddr) << "\n";
  77 #endif
  78   intptr_t Addr = RetAddr - 4;
  79
  80   intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)Addr);
  81
  82   // Rewrite the call target... so that we don't end up here every time we
  83   // execute the call.
  84   *(intptr_t *)Addr = NewVal;
  85
  86   // Change the return address to reexecute the branch and link instruction...
  87   *RetAddrLoc -= 12;
  88 }
  89
  90 TargetJITInfo::LazyResolverFn
  91 ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
  92   JITCompilerFunction = F;
  93   return ARMCompilationCallback;
  94 }
  95
  96 void *ARMJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
  97   unsigned addr = (intptr_t)Fn;
  98   // If this is just a call to an external function, emit a branch instead of a
  99   // call.  The code is the same except for one bit of the last instruction.
 100   if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
 101     // branch to the corresponding function addr
 102     // the stub is 8-byte size and 4-aligned
 103     MCE.startFunctionStub(8, 4);
 104     MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4]
 105     MCE.emitWordLE(addr);       // addr of function
 106   } else {
 107     // branch and link to the corresponding function addr
 108     // the stub is 20-byte size and 4-aligned
 109     MCE.startFunctionStub(20, 4);
 110     MCE.emitWordLE(0xE92D4800); // STMFD SP!, [R11, LR]
 111     MCE.emitWordLE(0xE28FE004); // ADD LR, PC, #4
 112     MCE.emitWordLE(0xE51FF004); // LDR PC, [PC,#-4]
 113     MCE.emitWordLE(addr);       // addr of function
 114     MCE.emitWordLE(0xE8BD8800); // LDMFD SP!, [R11, PC]
 115   }
 116
 117   return MCE.finishFunctionStub(0);
 118 }
 119
 120 /// relocate - Before the JIT can run a block of code that has been emitted,
 121 /// it must rewrite the code to contain the actual addresses of any
 122 /// referenced global symbols.
 123 void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
 124                           unsigned NumRelocs, unsigned char* GOTBase) {
 125   for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
 126     void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
 127     intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
 128     switch ((ARM::RelocationType)MR->getRelocationType()) {
 129     case ARM::reloc_arm_relative: {
 130       // It is necessary to calculate the correct PC relative value. We
 131       // subtract the base addr from the target addr to form a byte offset.
 132       ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
 133       // If the result is positive, set bit U(23) to 1.
 134       if (ResultPtr >= 0)
 135         *((unsigned*)RelocPos) |= 1 << 23;
 136       else {
 137       // otherwise, obtain the absolute value and set
 138       // bit U(23) to 0.
 139         ResultPtr *= -1;
 140         *((unsigned*)RelocPos) &= 0xFF7FFFFF;
 141       }
 142       // set the immed value calculated
 143       *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
 144       // set register Rn to PC
 145       *((unsigned*)RelocPos) |= 0xF << 16;
 146       break;
 147     }
 148     case ARM::reloc_arm_branch: {
 149       // It is necessary to calculate the correct value of signed_immed_24
 150       // field. We subtract the base addr from the target addr to form a
 151       // byte offset, which must be inside the range -33554432 and +33554428.
 152       // Then, we set the signed_immed_24 field of the instruction to bits
 153       // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
 154       ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
 155       ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
 156       assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
 157       *((unsigned*)RelocPos) |= ResultPtr;
 158       break;
 159     }
 160     }
 161   }
 162 }