lib/VMCore/Instruction.cpp

   1 //===-- Instruction.cpp - Implement the Instruction class -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements the Instruction class for the VMCore library.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/Type.h"
  15 #include "llvm/Instructions.h"
  16 #include "llvm/IntrinsicInst.h"
  17 #include "llvm/Function.h"
  18 #include "llvm/Support/LeakDetector.h"
  19 using namespace llvm;
  20
  21 Instruction::Instruction(const Type *ty, unsigned it, Use *Ops, unsigned NumOps,
  22                          Instruction *InsertBefore)
  23   : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
  24   // Make sure that we get added to a basicblock
  25   LeakDetector::addGarbageObject(this);
  26
  27   // If requested, insert this instruction into a basic block...
  28   if (InsertBefore) {
  29     assert(InsertBefore->getParent() &&
  30            "Instruction to insert before is not in a basic block!");
  31     InsertBefore->getParent()->getInstList().insert(InsertBefore, this);
  32   }
  33 }
  34
  35 Instruction::Instruction(const Type *ty, unsigned it, Use *Ops, unsigned NumOps,
  36                          BasicBlock *InsertAtEnd)
  37   : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(0) {
  38   // Make sure that we get added to a basicblock
  39   LeakDetector::addGarbageObject(this);
  40
  41   // append this instruction into the basic block
  42   assert(InsertAtEnd && "Basic block to append to may not be NULL!");
  43   InsertAtEnd->getInstList().push_back(this);
  44 }
  45
  46
  47 // Out of line virtual method, so the vtable, etc has a home.
  48 Instruction::~Instruction() {
  49   assert(Parent == 0 && "Instruction still linked in the program!");
  50 }
  51
  52
  53 void Instruction::setParent(BasicBlock *P) {
  54   if (getParent()) {
  55     if (!P) LeakDetector::addGarbageObject(this);
  56   } else {
  57     if (P) LeakDetector::removeGarbageObject(this);
  58   }
  59
  60   Parent = P;
  61 }
  62
  63 void Instruction::removeFromParent() {
  64   getParent()->getInstList().remove(this);
  65 }
  66
  67 void Instruction::eraseFromParent() {
  68   getParent()->getInstList().erase(this);
  69 }
  70
  71 /// moveBefore - Unlink this instruction from its current basic block and
  72 /// insert it into the basic block that MovePos lives in, right before
  73 /// MovePos.
  74 void Instruction::moveBefore(Instruction *MovePos) {
  75   MovePos->getParent()->getInstList().splice(MovePos,getParent()->getInstList(),
  76                                              this);
  77 }
  78
  79
  80 const char *Instruction::getOpcodeName(unsigned OpCode) {
  81   switch (OpCode) {
  82   // Terminators
  83   case Ret:    return "ret";
  84   case Br:     return "br";
  85   case Switch: return "switch";
  86   case Invoke: return "invoke";
  87   case Unwind: return "unwind";
  88   case Unreachable: return "unreachable";
  89
  90   // Standard binary operators...
  91   case Add: return "add";
  92   case Sub: return "sub";
  93   case Mul: return "mul";
  94   case UDiv: return "udiv";
  95   case SDiv: return "sdiv";
  96   case FDiv: return "fdiv";
  97   case URem: return "urem";
  98   case SRem: return "srem";
  99   case FRem: return "frem";
 100
 101   // Logical operators...
 102   case And: return "and";
 103   case Or : return "or";
 104   case Xor: return "xor";
 105
 106   // Memory instructions...
 107   case Malloc:        return "malloc";
 108   case Free:          return "free";
 109   case Alloca:        return "alloca";
 110   case Load:          return "load";
 111   case Store:         return "store";
 112   case GetElementPtr: return "getelementptr";
 113
 114   // Convert instructions...
 115   case Trunc:     return "trunc";
 116   case ZExt:      return "zext";
 117   case SExt:      return "sext";
 118   case FPTrunc:   return "fptrunc";
 119   case FPExt:     return "fpext";
 120   case FPToUI:    return "fptoui";
 121   case FPToSI:    return "fptosi";
 122   case UIToFP:    return "uitofp";
 123   case SIToFP:    return "sitofp";
 124   case IntToPtr:  return "inttoptr";
 125   case PtrToInt:  return "ptrtoint";
 126   case BitCast:   return "bitcast";
 127
 128   // Other instructions...
 129   case ICmp:           return "icmp";
 130   case FCmp:           return "fcmp";
 131   case PHI:            return "phi";
 132   case Select:         return "select";
 133   case Call:           return "call";
 134   case Shl:            return "shl";
 135   case LShr:           return "lshr";
 136   case AShr:           return "ashr";
 137   case VAArg:          return "va_arg";
 138   case ExtractElement: return "extractelement";
 139   case InsertElement:  return "insertelement";
 140   case ShuffleVector:  return "shufflevector";
 141
 142   default: return "<Invalid operator> ";
 143   }
 144
 145   return 0;
 146 }
 147
 148 /// isIdenticalTo - Return true if the specified instruction is exactly
 149 /// identical to the current one.  This means that all operands match and any
 150 /// extra information (e.g. load is volatile) agree.
 151 bool Instruction::isIdenticalTo(Instruction *I) const {
 152   if (getOpcode() != I->getOpcode() ||
 153       getNumOperands() != I->getNumOperands() ||
 154       getType() != I->getType())
 155     return false;
 156
 157   // We have two instructions of identical opcode and #operands.  Check to see
 158   // if all operands are the same.
 159   for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
 160     if (getOperand(i) != I->getOperand(i))
 161       return false;
 162
 163   // Check special state that is a part of some instructions.
 164   if (const LoadInst *LI = dyn_cast<LoadInst>(this))
 165     return LI->isVolatile() == cast<LoadInst>(I)->isVolatile();
 166   if (const StoreInst *SI = dyn_cast<StoreInst>(this))
 167     return SI->isVolatile() == cast<StoreInst>(I)->isVolatile();
 168   if (const CmpInst *CI = dyn_cast<CmpInst>(this))
 169     return CI->getPredicate() == cast<CmpInst>(I)->getPredicate();
 170   if (const CallInst *CI = dyn_cast<CallInst>(this))
 171     return CI->isTailCall() == cast<CallInst>(I)->isTailCall();
 172   return true;
 173 }
 174
 175 // isSameOperationAs
 176 bool Instruction::isSameOperationAs(Instruction *I) const {
 177   if (getOpcode() != I->getOpcode() || getType() != I->getType() ||
 178       getNumOperands() != I->getNumOperands())
 179     return false;
 180
 181   // We have two instructions of identical opcode and #operands.  Check to see
 182   // if all operands are the same type
 183   for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
 184     if (getOperand(i)->getType() != I->getOperand(i)->getType())
 185       return false;
 186
 187   // Check special state that is a part of some instructions.
 188   if (const LoadInst *LI = dyn_cast<LoadInst>(this))
 189     return LI->isVolatile() == cast<LoadInst>(I)->isVolatile();
 190   if (const StoreInst *SI = dyn_cast<StoreInst>(this))
 191     return SI->isVolatile() == cast<StoreInst>(I)->isVolatile();
 192   if (const CmpInst *CI = dyn_cast<CmpInst>(this))
 193     return CI->getPredicate() == cast<CmpInst>(I)->getPredicate();
 194   if (const CallInst *CI = dyn_cast<CallInst>(this))
 195     return CI->isTailCall() == cast<CallInst>(I)->isTailCall();
 196
 197   return true;
 198 }
 199
 200 // IntrinsicOnlyReadsMemory - Return true if the specified intrinsic doesn't
 201 // have any side-effects or if it only reads memory.
 202 static bool IntrinsicOnlyReadsMemory(unsigned IntrinsicID) {
 203 #define GET_SIDE_EFFECT_INFO
 204 #include "llvm/Intrinsics.gen"
 205 #undef GET_SIDE_EFFECT_INFO
 206   return false;
 207 }
 208
 209 /// mayWriteToMemory - Return true if this instruction may modify memory.
 210 ///
 211 bool Instruction::mayWriteToMemory() const {
 212   switch (getOpcode()) {
 213   default: return false;
 214   case Instruction::Free:
 215   case Instruction::Store:
 216   case Instruction::Invoke:
 217   case Instruction::VAArg:
 218     return true;
 219   case Instruction::Call:
 220     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(this)) {
 221       // If the intrinsic doesn't write memory, it is safe.
 222       return !IntrinsicOnlyReadsMemory(II->getIntrinsicID());
 223     }
 224     return true;
 225   case Instruction::Load:
 226     return cast<LoadInst>(this)->isVolatile();
 227   }
 228 }
 229
 230 /// isAssociative - Return true if the instruction is associative:
 231 ///
 232 ///   Associative operators satisfy:  x op (y op z) === (x op y) op z)
 233 ///
 234 /// In LLVM, the Add, Mul, And, Or, and Xor operators are associative, when not
 235 /// applied to floating point types.
 236 ///
 237 bool Instruction::isAssociative(unsigned Opcode, const Type *Ty) {
 238   if (Opcode == And || Opcode == Or || Opcode == Xor)
 239     return true;
 240
 241   // Add/Mul reassociate unless they are FP or FP vectors.
 242   if (Opcode == Add || Opcode == Mul)
 243     return !Ty->isFPOrFPVector();
 244   return 0;
 245 }
 246
 247 /// isCommutative - Return true if the instruction is commutative:
 248 ///
 249 ///   Commutative operators satisfy: (x op y) === (y op x)
 250 ///
 251 /// In LLVM, these are the associative operators, plus SetEQ and SetNE, when
 252 /// applied to any type.
 253 ///
 254 bool Instruction::isCommutative(unsigned op) {
 255   switch (op) {
 256   case Add:
 257   case Mul:
 258   case And:
 259   case Or:
 260   case Xor:
 261     return true;
 262   default:
 263     return false;
 264   }
 265 }
 266
 267 /// isTrappingInstruction - Return true if the instruction may trap.
 268 ///
 269 bool Instruction::isTrapping(unsigned op) {
 270   switch(op) {
 271   case UDiv:
 272   case SDiv:
 273   case FDiv:
 274   case URem:
 275   case SRem:
 276   case FRem:
 277   case Load:
 278   case Store:
 279   case Call:
 280   case Invoke:
 281     return true;
 282   default:
 283     return false;
 284   }
 285 }