[ARM] VQADD instructions
[llvm-complete.git] / lib / Target / AMDGPU / AMDGPUInstrInfo.h
blob698189e14c21eeb32bc3838a2c316a2f00a1f6e7
1 //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// Contains the definition of a TargetInstrInfo class that is common
11 /// to all AMD GPUs.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
18 #include "AMDGPU.h"
19 #include "Utils/AMDGPUBaseInfo.h"
20 #include "llvm/CodeGen/TargetInstrInfo.h"
22 namespace llvm {
24 class GCNSubtarget;
25 class MachineFunction;
26 class MachineInstr;
27 class MachineInstrBuilder;
29 class AMDGPUInstrInfo {
30 public:
31 explicit AMDGPUInstrInfo(const GCNSubtarget &st);
33 static bool isUniformMMO(const MachineMemOperand *MMO);
36 namespace AMDGPU {
38 struct RsrcIntrinsic {
39 unsigned Intr;
40 uint8_t RsrcArg;
41 bool IsImage;
43 const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr);
45 struct D16ImageDimIntrinsic {
46 unsigned Intr;
47 unsigned D16HelperIntr;
49 const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);
51 struct ImageDimIntrinsicInfo {
52 unsigned Intr;
53 unsigned BaseOpcode;
54 MIMGDim Dim;
56 const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr);
58 } // end AMDGPU namespace
59 } // End llvm namespace
61 #endif