[ARM] VQADD instructions
[llvm-complete.git] / lib / Target / RISCV / RISCVRegisterBankInfo.h
blob05fac992734d999722ac9e345ddf2c73bc0a4a03
1 //===-- RISCVRegisterBankInfo.h ---------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the RegisterBankInfo class for RISCV.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVREGISTERBANKINFO_H
16 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
18 #define GET_REGBANK_DECLARATIONS
19 #include "RISCVGenRegisterBank.inc"
21 namespace llvm {
23 class TargetRegisterInfo;
25 class RISCVGenRegisterBankInfo : public RegisterBankInfo {
26 protected:
27 #define GET_TARGET_REGBANK_CLASS
28 #include "RISCVGenRegisterBank.inc"
31 /// This class provides the information for the target register banks.
32 class RISCVRegisterBankInfo final : public RISCVGenRegisterBankInfo {
33 public:
34 RISCVRegisterBankInfo(const TargetRegisterInfo &TRI);
36 } // end namespace llvm
37 #endif