1 //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file provides Sparc specific target descriptions.
11 //===----------------------------------------------------------------------===//
13 #include "SparcMCTargetDesc.h"
14 #include "SparcInstPrinter.h"
15 #include "SparcMCAsmInfo.h"
16 #include "SparcTargetStreamer.h"
17 #include "TargetInfo/SparcTargetInfo.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
26 #define GET_INSTRINFO_MC_DESC
27 #include "SparcGenInstrInfo.inc"
29 #define GET_SUBTARGETINFO_MC_DESC
30 #include "SparcGenSubtargetInfo.inc"
32 #define GET_REGINFO_MC_DESC
33 #include "SparcGenRegisterInfo.inc"
35 static MCAsmInfo
*createSparcMCAsmInfo(const MCRegisterInfo
&MRI
,
37 MCAsmInfo
*MAI
= new SparcELFMCAsmInfo(TT
);
38 unsigned Reg
= MRI
.getDwarfRegNum(SP::O6
, true);
39 MCCFIInstruction Inst
= MCCFIInstruction::createDefCfa(nullptr, Reg
, 0);
40 MAI
->addInitialFrameState(Inst
);
44 static MCAsmInfo
*createSparcV9MCAsmInfo(const MCRegisterInfo
&MRI
,
46 MCAsmInfo
*MAI
= new SparcELFMCAsmInfo(TT
);
47 unsigned Reg
= MRI
.getDwarfRegNum(SP::O6
, true);
48 MCCFIInstruction Inst
= MCCFIInstruction::createDefCfa(nullptr, Reg
, 2047);
49 MAI
->addInitialFrameState(Inst
);
53 static MCInstrInfo
*createSparcMCInstrInfo() {
54 MCInstrInfo
*X
= new MCInstrInfo();
55 InitSparcMCInstrInfo(X
);
59 static MCRegisterInfo
*createSparcMCRegisterInfo(const Triple
&TT
) {
60 MCRegisterInfo
*X
= new MCRegisterInfo();
61 InitSparcMCRegisterInfo(X
, SP::O7
);
65 static MCSubtargetInfo
*
66 createSparcMCSubtargetInfo(const Triple
&TT
, StringRef CPU
, StringRef FS
) {
68 CPU
= (TT
.getArch() == Triple::sparcv9
) ? "v9" : "v8";
69 return createSparcMCSubtargetInfoImpl(TT
, CPU
, FS
);
72 static MCTargetStreamer
*
73 createObjectTargetStreamer(MCStreamer
&S
, const MCSubtargetInfo
&STI
) {
74 return new SparcTargetELFStreamer(S
);
77 static MCTargetStreamer
*createTargetAsmStreamer(MCStreamer
&S
,
78 formatted_raw_ostream
&OS
,
79 MCInstPrinter
*InstPrint
,
81 return new SparcTargetAsmStreamer(S
, OS
);
84 static MCInstPrinter
*createSparcMCInstPrinter(const Triple
&T
,
85 unsigned SyntaxVariant
,
87 const MCInstrInfo
&MII
,
88 const MCRegisterInfo
&MRI
) {
89 return new SparcInstPrinter(MAI
, MII
, MRI
);
92 extern "C" void LLVMInitializeSparcTargetMC() {
93 // Register the MC asm info.
94 RegisterMCAsmInfoFn
X(getTheSparcTarget(), createSparcMCAsmInfo
);
95 RegisterMCAsmInfoFn
Y(getTheSparcV9Target(), createSparcV9MCAsmInfo
);
96 RegisterMCAsmInfoFn
Z(getTheSparcelTarget(), createSparcMCAsmInfo
);
99 {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
100 // Register the MC instruction info.
101 TargetRegistry::RegisterMCInstrInfo(*T
, createSparcMCInstrInfo
);
103 // Register the MC register info.
104 TargetRegistry::RegisterMCRegInfo(*T
, createSparcMCRegisterInfo
);
106 // Register the MC subtarget info.
107 TargetRegistry::RegisterMCSubtargetInfo(*T
, createSparcMCSubtargetInfo
);
109 // Register the MC Code Emitter.
110 TargetRegistry::RegisterMCCodeEmitter(*T
, createSparcMCCodeEmitter
);
112 // Register the asm backend.
113 TargetRegistry::RegisterMCAsmBackend(*T
, createSparcAsmBackend
);
115 // Register the object target streamer.
116 TargetRegistry::RegisterObjectTargetStreamer(*T
,
117 createObjectTargetStreamer
);
119 // Register the asm streamer.
120 TargetRegistry::RegisterAsmTargetStreamer(*T
, createTargetAsmStreamer
);
122 // Register the MCInstPrinter
123 TargetRegistry::RegisterMCInstPrinter(*T
, createSparcMCInstPrinter
);