[ARM] VQADD instructions
[llvm-complete.git] / lib / Target / Sparc / SparcRegisterInfo.h
blob118ef9d80fae7a5b5b603c30404f1dcd40751782
1 //===-- SparcRegisterInfo.h - Sparc Register Information Impl ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Sparc implementation of the TargetRegisterInfo class.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_SPARC_SPARCREGISTERINFO_H
14 #define LLVM_LIB_TARGET_SPARC_SPARCREGISTERINFO_H
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
18 #define GET_REGINFO_HEADER
19 #include "SparcGenRegisterInfo.inc"
21 namespace llvm {
22 struct SparcRegisterInfo : public SparcGenRegisterInfo {
23 SparcRegisterInfo();
25 /// Code Generation virtual methods...
26 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
27 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
28 CallingConv::ID CC) const override;
30 const uint32_t* getRTCallPreservedMask(CallingConv::ID CC) const;
32 BitVector getReservedRegs(const MachineFunction &MF) const override;
34 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
35 unsigned Kind) const override;
37 void eliminateFrameIndex(MachineBasicBlock::iterator II,
38 int SPAdj, unsigned FIOperandNum,
39 RegScavenger *RS = nullptr) const override;
41 Register getFrameRegister(const MachineFunction &MF) const override;
43 bool canRealignStack(const MachineFunction &MF) const override;
47 } // end namespace llvm
49 #endif