[ARM] MVE integer min and max
[llvm-complete.git] / include / llvm / CodeGen / GlobalISel / CallLowering.h
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1 //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file describes how to lower LLVM calls to machine code calls.
11 ///
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
15 #define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/CallingConvLower.h"
20 #include "llvm/CodeGen/TargetCallingConv.h"
21 #include "llvm/IR/CallSite.h"
22 #include "llvm/IR/CallingConv.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/MachineValueType.h"
25 #include <cstdint>
26 #include <functional>
28 namespace llvm {
30 class DataLayout;
31 class Function;
32 class MachineIRBuilder;
33 class MachineOperand;
34 struct MachinePointerInfo;
35 class MachineRegisterInfo;
36 class TargetLowering;
37 class Type;
38 class Value;
40 class CallLowering {
41 const TargetLowering *TLI;
43 virtual void anchor();
44 public:
45 struct ArgInfo {
46 SmallVector<Register, 4> Regs;
47 Type *Ty;
48 ISD::ArgFlagsTy Flags;
49 bool IsFixed;
51 ArgInfo(ArrayRef<Register> Regs, Type *Ty,
52 ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy{}, bool IsFixed = true)
53 : Regs(Regs.begin(), Regs.end()), Ty(Ty), Flags(Flags),
54 IsFixed(IsFixed) {
55 // FIXME: We should have just one way of saying "no register".
56 assert((Ty->isVoidTy() == (Regs.empty() || Regs[0] == 0)) &&
57 "only void types should have no register");
61 /// Argument handling is mostly uniform between the four places that
62 /// make these decisions: function formal arguments, call
63 /// instruction args, call instruction returns and function
64 /// returns. However, once a decision has been made on where an
65 /// arugment should go, exactly what happens can vary slightly. This
66 /// class abstracts the differences.
67 struct ValueHandler {
68 ValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
69 CCAssignFn *AssignFn)
70 : MIRBuilder(MIRBuilder), MRI(MRI), AssignFn(AssignFn) {}
72 virtual ~ValueHandler() = default;
74 /// Returns true if the handler is dealing with formal arguments,
75 /// not with return values etc.
76 virtual bool isArgumentHandler() const { return false; }
78 /// Materialize a VReg containing the address of the specified
79 /// stack-based object. This is either based on a FrameIndex or
80 /// direct SP manipulation, depending on the context. \p MPO
81 /// should be initialized to an appropriate description of the
82 /// address created.
83 virtual Register getStackAddress(uint64_t Size, int64_t Offset,
84 MachinePointerInfo &MPO) = 0;
86 /// The specified value has been assigned to a physical register,
87 /// handle the appropriate COPY (either to or from) and mark any
88 /// relevant uses/defines as needed.
89 virtual void assignValueToReg(Register ValVReg, Register PhysReg,
90 CCValAssign &VA) = 0;
92 /// The specified value has been assigned to a stack
93 /// location. Load or store it there, with appropriate extension
94 /// if necessary.
95 virtual void assignValueToAddress(Register ValVReg, Register Addr,
96 uint64_t Size, MachinePointerInfo &MPO,
97 CCValAssign &VA) = 0;
99 /// Handle custom values, which may be passed into one or more of \p VAs.
100 /// \return The number of \p VAs that have been assigned after the first
101 /// one, and which should therefore be skipped from further
102 /// processing.
103 virtual unsigned assignCustomValue(const ArgInfo &Arg,
104 ArrayRef<CCValAssign> VAs) {
105 // This is not a pure virtual method because not all targets need to worry
106 // about custom values.
107 llvm_unreachable("Custom values not supported");
110 Register extendRegister(Register ValReg, CCValAssign &VA);
112 virtual bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT,
113 CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
114 CCState &State) {
115 return AssignFn(ValNo, ValVT, LocVT, LocInfo, Info.Flags, State);
118 MachineIRBuilder &MIRBuilder;
119 MachineRegisterInfo &MRI;
120 CCAssignFn *AssignFn;
122 private:
123 virtual void anchor();
126 protected:
127 /// Getter for generic TargetLowering class.
128 const TargetLowering *getTLI() const {
129 return TLI;
132 /// Getter for target specific TargetLowering class.
133 template <class XXXTargetLowering>
134 const XXXTargetLowering *getTLI() const {
135 return static_cast<const XXXTargetLowering *>(TLI);
138 template <typename FuncInfoTy>
139 void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL,
140 const FuncInfoTy &FuncInfo) const;
142 /// Generate instructions for packing \p SrcRegs into one big register
143 /// corresponding to the aggregate type \p PackedTy.
145 /// \param SrcRegs should contain one virtual register for each base type in
146 /// \p PackedTy, as returned by computeValueLLTs.
148 /// \return The packed register.
149 Register packRegs(ArrayRef<Register> SrcRegs, Type *PackedTy,
150 MachineIRBuilder &MIRBuilder) const;
152 /// Generate instructions for unpacking \p SrcReg into the \p DstRegs
153 /// corresponding to the aggregate type \p PackedTy.
155 /// \param DstRegs should contain one virtual register for each base type in
156 /// \p PackedTy, as returned by computeValueLLTs.
157 void unpackRegs(ArrayRef<Register> DstRegs, Register SrcReg, Type *PackedTy,
158 MachineIRBuilder &MIRBuilder) const;
160 /// Invoke Handler::assignArg on each of the given \p Args and then use
161 /// \p Callback to move them to the assigned locations.
163 /// \return True if everything has succeeded, false otherwise.
164 bool handleAssignments(MachineIRBuilder &MIRBuilder, ArrayRef<ArgInfo> Args,
165 ValueHandler &Handler) const;
167 public:
168 CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
169 virtual ~CallLowering() = default;
171 /// \return true if the target is capable of handling swifterror values that
172 /// have been promoted to a specified register. The extended versions of
173 /// lowerReturn and lowerCall should be implemented.
174 virtual bool supportSwiftError() const {
175 return false;
178 /// This hook must be implemented to lower outgoing return values, described
179 /// by \p Val, into the specified virtual registers \p VRegs.
180 /// This hook is used by GlobalISel.
182 /// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter
183 /// that needs to be implicitly returned.
185 /// \return True if the lowering succeeds, false otherwise.
186 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
187 ArrayRef<Register> VRegs,
188 Register SwiftErrorVReg) const {
189 if (!supportSwiftError()) {
190 assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror");
191 return lowerReturn(MIRBuilder, Val, VRegs);
193 return false;
196 /// This hook behaves as the extended lowerReturn function, but for targets
197 /// that do not support swifterror value promotion.
198 virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
199 ArrayRef<Register> VRegs) const {
200 return false;
203 /// This hook must be implemented to lower the incoming (formal)
204 /// arguments, described by \p VRegs, for GlobalISel. Each argument
205 /// must end up in the related virtual registers described by \p VRegs.
206 /// In other words, the first argument should end up in \c VRegs[0],
207 /// the second in \c VRegs[1], and so on. For each argument, there will be one
208 /// register for each non-aggregate type, as returned by \c computeValueLLTs.
209 /// \p MIRBuilder is set to the proper insertion for the argument
210 /// lowering.
212 /// \return True if the lowering succeeded, false otherwise.
213 virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder,
214 const Function &F,
215 ArrayRef<ArrayRef<Register>> VRegs) const {
216 return false;
219 /// This hook must be implemented to lower the given call instruction,
220 /// including argument and return value marshalling.
222 /// \p CallConv is the calling convention to be used for the call.
224 /// \p Callee is the destination of the call. It should be either a register,
225 /// globaladdress, or externalsymbol.
227 /// \p OrigRet is a descriptor for the return type of the function.
229 /// \p OrigArgs is a list of descriptors of the arguments passed to the
230 /// function.
232 /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
233 /// parameter, and contains the vreg that the swifterror should be copied into
234 /// after the call.
236 /// \return true if the lowering succeeded, false otherwise.
237 virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
238 const MachineOperand &Callee, const ArgInfo &OrigRet,
239 ArrayRef<ArgInfo> OrigArgs,
240 Register SwiftErrorVReg) const {
241 if (!supportSwiftError()) {
242 assert(SwiftErrorVReg == 0 && "trying to use unsupported swifterror");
243 return lowerCall(MIRBuilder, CallConv, Callee, OrigRet, OrigArgs);
245 return false;
248 /// This hook behaves as the extended lowerCall function, but for targets that
249 /// do not support swifterror value promotion.
250 virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
251 const MachineOperand &Callee, const ArgInfo &OrigRet,
252 ArrayRef<ArgInfo> OrigArgs) const {
253 return false;
256 /// Lower the given call instruction, including argument and return value
257 /// marshalling.
259 /// \p CI is the call/invoke instruction.
261 /// \p ResRegs are the registers where the call's return value should be
262 /// stored (or 0 if there is no return value). There will be one register for
263 /// each non-aggregate type, as returned by \c computeValueLLTs.
265 /// \p ArgRegs is a list of lists of virtual registers containing each
266 /// argument that needs to be passed (argument \c i should be placed in \c
267 /// ArgRegs[i]). For each argument, there will be one register for each
268 /// non-aggregate type, as returned by \c computeValueLLTs.
270 /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
271 /// parameter, and contains the vreg that the swifterror should be copied into
272 /// after the call.
274 /// \p GetCalleeReg is a callback to materialize a register for the callee if
275 /// the target determines it cannot jump to the destination based purely on \p
276 /// CI. This might be because \p CI is indirect, or because of the limited
277 /// range of an immediate jump.
279 /// \return true if the lowering succeeded, false otherwise.
280 bool lowerCall(MachineIRBuilder &MIRBuilder, ImmutableCallSite CS,
281 ArrayRef<Register> ResRegs,
282 ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg,
283 std::function<unsigned()> GetCalleeReg) const;
286 } // end namespace llvm
288 #endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H