1 //===- HexagonBlockRanges.h -------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
12 #include "llvm/ADT/BitVector.h"
21 class HexagonSubtarget
;
22 class MachineBasicBlock
;
23 class MachineFunction
;
25 class MachineRegisterInfo
;
27 class TargetInstrInfo
;
28 class TargetRegisterInfo
;
30 struct HexagonBlockRanges
{
31 HexagonBlockRanges(MachineFunction
&MF
);
36 bool operator<(RegisterRef R
) const {
37 return Reg
< R
.Reg
|| (Reg
== R
.Reg
&& Sub
< R
.Sub
);
40 using RegisterSet
= std::set
<RegisterRef
>;
42 // This is to represent an "index", which is an abstraction of a position
43 // of an instruction within a basic block.
50 First
= 11 // 10th + 1st
54 IndexType(unsigned Idx
) : Index(Idx
) {}
56 static bool isInstr(IndexType X
) { return X
.Index
>= First
; }
58 operator unsigned() const;
59 bool operator== (unsigned x
) const;
60 bool operator== (IndexType Idx
) const;
61 bool operator!= (unsigned x
) const;
62 bool operator!= (IndexType Idx
) const;
63 IndexType
operator++ ();
64 bool operator< (unsigned Idx
) const;
65 bool operator< (IndexType Idx
) const;
66 bool operator<= (IndexType Idx
) const;
69 bool operator> (IndexType Idx
) const;
70 bool operator>= (IndexType Idx
) const;
72 unsigned Index
= None
;
75 // A range of indices, essentially a representation of a live range.
76 // This is also used to represent "dead ranges", i.e. ranges where a
78 class IndexRange
: public std::pair
<IndexType
,IndexType
> {
80 IndexRange() = default;
81 IndexRange(IndexType Start
, IndexType End
, bool F
= false, bool T
= false)
82 : std::pair
<IndexType
,IndexType
>(Start
, End
), Fixed(F
), TiedEnd(T
) {}
84 IndexType
start() const { return first
; }
85 IndexType
end() const { return second
; }
87 bool operator< (const IndexRange
&A
) const {
88 return start() < A
.start();
91 bool overlaps(const IndexRange
&A
) const;
92 bool contains(const IndexRange
&A
) const;
93 void merge(const IndexRange
&A
);
95 bool Fixed
= false; // Can be renamed? "Fixed" means "no".
96 bool TiedEnd
= false; // The end is not a use, but a dead def tied to a use.
99 void setStart(const IndexType
&S
) { first
= S
; }
100 void setEnd(const IndexType
&E
) { second
= E
; }
103 // A list of index ranges. This represents liveness of a register
105 class RangeList
: public std::vector
<IndexRange
> {
107 void add(IndexType Start
, IndexType End
, bool Fixed
, bool TiedEnd
) {
108 push_back(IndexRange(Start
, End
, Fixed
, TiedEnd
));
110 void add(const IndexRange
&Range
) {
114 void include(const RangeList
&RL
);
115 void unionize(bool MergeAdjacent
= false);
116 void subtract(const IndexRange
&Range
);
119 void addsub(const IndexRange
&A
, const IndexRange
&B
);
122 class InstrIndexMap
{
124 InstrIndexMap(MachineBasicBlock
&B
);
126 MachineInstr
*getInstr(IndexType Idx
) const;
127 IndexType
getIndex(MachineInstr
*MI
) const;
128 MachineBasicBlock
&getBlock() const { return Block
; }
129 IndexType
getPrevIndex(IndexType Idx
) const;
130 IndexType
getNextIndex(IndexType Idx
) const;
131 void replaceInstr(MachineInstr
*OldMI
, MachineInstr
*NewMI
);
133 friend raw_ostream
&operator<< (raw_ostream
&OS
, const InstrIndexMap
&Map
);
135 IndexType First
, Last
;
138 MachineBasicBlock
&Block
;
139 std::map
<IndexType
,MachineInstr
*> Map
;
142 using RegToRangeMap
= std::map
<RegisterRef
, RangeList
>;
144 RegToRangeMap
computeLiveMap(InstrIndexMap
&IndexMap
);
145 RegToRangeMap
computeDeadMap(InstrIndexMap
&IndexMap
, RegToRangeMap
&LiveMap
);
146 static RegisterSet
expandToSubRegs(RegisterRef R
,
147 const MachineRegisterInfo
&MRI
, const TargetRegisterInfo
&TRI
);
149 struct PrintRangeMap
{
150 PrintRangeMap(const RegToRangeMap
&M
, const TargetRegisterInfo
&I
)
153 friend raw_ostream
&operator<< (raw_ostream
&OS
, const PrintRangeMap
&P
);
156 const RegToRangeMap
&Map
;
157 const TargetRegisterInfo
&TRI
;
161 RegisterSet
getLiveIns(const MachineBasicBlock
&B
,
162 const MachineRegisterInfo
&MRI
, const TargetRegisterInfo
&TRI
);
164 void computeInitialLiveRanges(InstrIndexMap
&IndexMap
,
165 RegToRangeMap
&LiveMap
);
168 const HexagonSubtarget
&HST
;
169 const TargetInstrInfo
&TII
;
170 const TargetRegisterInfo
&TRI
;
174 inline HexagonBlockRanges::IndexType::operator unsigned() const {
175 assert(Index
>= First
);
179 inline bool HexagonBlockRanges::IndexType::operator== (unsigned x
) const {
183 inline bool HexagonBlockRanges::IndexType::operator== (IndexType Idx
) const {
184 return Index
== Idx
.Index
;
187 inline bool HexagonBlockRanges::IndexType::operator!= (unsigned x
) const {
191 inline bool HexagonBlockRanges::IndexType::operator!= (IndexType Idx
) const {
192 return Index
!= Idx
.Index
;
196 HexagonBlockRanges::IndexType
HexagonBlockRanges::IndexType::operator++ () {
197 assert(Index
!= None
);
198 assert(Index
!= Exit
);
206 inline bool HexagonBlockRanges::IndexType::operator< (unsigned Idx
) const {
207 return operator< (IndexType(Idx
));
210 inline bool HexagonBlockRanges::IndexType::operator< (IndexType Idx
) const {
212 if (Index
== Idx
.Index
)
214 // !(None < x) for all x.
215 // !(x < None) for all x.
216 if (Index
== None
|| Idx
.Index
== None
)
218 // !(Exit < x) for all x.
219 // !(x < Entry) for all x.
220 if (Index
== Exit
|| Idx
.Index
== Entry
)
222 // Entry < x for all x != Entry.
223 // x < Exit for all x != Exit.
224 if (Index
== Entry
|| Idx
.Index
== Exit
)
227 return Index
< Idx
.Index
;
230 inline bool HexagonBlockRanges::IndexType::operator<= (IndexType Idx
) const {
231 return operator==(Idx
) || operator<(Idx
);
234 raw_ostream
&operator<< (raw_ostream
&OS
, HexagonBlockRanges::IndexType Idx
);
235 raw_ostream
&operator<< (raw_ostream
&OS
,
236 const HexagonBlockRanges::IndexRange
&IR
);
237 raw_ostream
&operator<< (raw_ostream
&OS
,
238 const HexagonBlockRanges::RangeList
&RL
);
239 raw_ostream
&operator<< (raw_ostream
&OS
,
240 const HexagonBlockRanges::InstrIndexMap
&M
);
241 raw_ostream
&operator<< (raw_ostream
&OS
,
242 const HexagonBlockRanges::PrintRangeMap
&P
);
244 } // end namespace llvm
246 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H