lib/Target/WebAssembly/WebAssemblyInstrInfo.h

   1 //=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 ///
   9 /// \file
  10 /// This file contains the WebAssembly implementation of the
  11 /// TargetInstrInfo class.
  12 ///
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
  16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
  17
  18 #include "WebAssemblyRegisterInfo.h"
  19 #include "llvm/CodeGen/TargetInstrInfo.h"
  20
  21 #define GET_INSTRINFO_HEADER
  22 #include "WebAssemblyGenInstrInfo.inc"
  23
  24 #define GET_INSTRINFO_OPERAND_ENUM
  25 #include "WebAssemblyGenInstrInfo.inc"
  26
  27 namespace llvm {
  28
  29 namespace WebAssembly {
  30
  31 int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIndex);
  32
  33 }
  34
  35 class WebAssemblySubtarget;
  36
  37 class WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo {
  38   const WebAssemblyRegisterInfo RI;
  39
  40 public:
  41   explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
  42
  43   const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
  44
  45   bool isReallyTriviallyReMaterializable(const MachineInstr &MI,
  46                                          AliasAnalysis *AA) const override;
  47
  48   void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
  49                    const DebugLoc &DL, unsigned DestReg, unsigned SrcReg,
  50                    bool KillSrc) const override;
  51   MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
  52                                        unsigned OpIdx1,
  53                                        unsigned OpIdx2) const override;
  54
  55   bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
  56                      MachineBasicBlock *&FBB,
  57                      SmallVectorImpl<MachineOperand> &Cond,
  58                      bool AllowModify = false) const override;
  59   unsigned removeBranch(MachineBasicBlock &MBB,
  60                         int *BytesRemoved = nullptr) const override;
  61   unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
  62                         MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
  63                         const DebugLoc &DL,
  64                         int *BytesAdded = nullptr) const override;
  65   bool
  66   reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
  67 };
  68
  69 } // end namespace llvm
  70
  71 #endif