tools/llvm-mca/Views/InstructionInfoView.cpp

   1 //===--------------------- InstructionInfoView.cpp --------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 ///
  10 /// This file implements the InstructionInfoView API.
  11 ///
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "Views/InstructionInfoView.h"
  15
  16 namespace llvm {
  17 namespace mca {
  18
  19 void InstructionInfoView::printView(raw_ostream &OS) const {
  20   std::string Buffer;
  21   raw_string_ostream TempStream(Buffer);
  22   const MCSchedModel &SM = STI.getSchedModel();
  23
  24   std::string Instruction;
  25   raw_string_ostream InstrStream(Instruction);
  26
  27   TempStream << "\n\nInstruction Info:\n";
  28   TempStream << "[1]: #uOps\n[2]: Latency\n[3]: RThroughput\n"
  29              << "[4]: MayLoad\n[5]: MayStore\n[6]: HasSideEffects (U)\n\n";
  30
  31   TempStream << "[1]    [2]    [3]    [4]    [5]    [6]    Instructions:\n";
  32   for (const MCInst &Inst : Source) {
  33     const MCInstrDesc &MCDesc = MCII.get(Inst.getOpcode());
  34
  35     // Obtain the scheduling class information from the instruction.
  36     unsigned SchedClassID = MCDesc.getSchedClass();
  37     unsigned CPUID = SM.getProcessorID();
  38
  39     // Try to solve variant scheduling classes.
  40     while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant())
  41       SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &Inst, CPUID);
  42
  43     const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
  44     unsigned NumMicroOpcodes = SCDesc.NumMicroOps;
  45     unsigned Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
  46     // Add extra latency due to delays in the forwarding data paths.
  47     Latency += MCSchedModel::getForwardingDelayCycles(
  48         STI.getReadAdvanceEntries(SCDesc));
  49     Optional<double> RThroughput =
  50         MCSchedModel::getReciprocalThroughput(STI, SCDesc);
  51
  52     TempStream << ' ' << NumMicroOpcodes << "    ";
  53     if (NumMicroOpcodes < 10)
  54       TempStream << "  ";
  55     else if (NumMicroOpcodes < 100)
  56       TempStream << ' ';
  57     TempStream << Latency << "   ";
  58     if (Latency < 10)
  59       TempStream << "  ";
  60     else if (Latency < 100)
  61       TempStream << ' ';
  62
  63     if (RThroughput.hasValue()) {
  64       double RT = RThroughput.getValue();
  65       TempStream << format("%.2f", RT) << ' ';
  66       if (RT < 10.0)
  67         TempStream << "  ";
  68       else if (RT < 100.0)
  69         TempStream << ' ';
  70     } else {
  71       TempStream << " -     ";
  72     }
  73     TempStream << (MCDesc.mayLoad() ? " *     " : "       ");
  74     TempStream << (MCDesc.mayStore() ? " *     " : "       ");
  75     TempStream << (MCDesc.hasUnmodeledSideEffects() ? " U " : "   ");
  76
  77     MCIP.printInst(&Inst, InstrStream, "", STI);
  78     InstrStream.flush();
  79
  80     // Consume any tabs or spaces at the beginning of the string.
  81     StringRef Str(Instruction);
  82     Str = Str.ltrim();
  83     TempStream << "    " << Str << '\n';
  84     Instruction = "";
  85   }
  86
  87   TempStream.flush();
  88   OS << Buffer;
  89 }
  90 } // namespace mca.
  91 } // namespace llvm