1 ; RUN: llc < %s -mtriple=arm64-apple-ios | FileCheck %s
3 ; <rdar://problem/13820218>
5 define signext i16 @extendedLeftShiftcharToshortBy4(i8 signext %a) nounwind readnone ssp {
7 ; CHECK-LABEL: extendedLeftShiftcharToshortBy4:
8 ; CHECK: add [[REG:w[0-9]+]], w0, #1
9 ; CHECK: sbfiz w0, [[REG]], #4, #8
11 %conv1 = sext i8 %inc to i32
12 %shl = shl nsw i32 %conv1, 4
13 %conv2 = trunc i32 %shl to i16
17 define signext i16 @extendedRightShiftcharToshortBy4(i8 signext %a) nounwind readnone ssp {
19 ; CHECK-LABEL: extendedRightShiftcharToshortBy4:
20 ; CHECK: add [[REG:w[0-9]+]], w0, #1
21 ; CHECK: sbfx w0, [[REG]], #4, #4
23 %conv1 = sext i8 %inc to i32
24 %shr4 = lshr i32 %conv1, 4
25 %conv2 = trunc i32 %shr4 to i16
29 define signext i16 @extendedLeftShiftcharToshortBy8(i8 signext %a) nounwind readnone ssp {
31 ; CHECK-LABEL: extendedLeftShiftcharToshortBy8:
32 ; CHECK: add [[REG:w[0-9]+]], w0, #1
33 ; CHECK: sbfiz w0, [[REG]], #8, #8
35 %conv1 = sext i8 %inc to i32
36 %shl = shl nsw i32 %conv1, 8
37 %conv2 = trunc i32 %shl to i16
41 define signext i16 @extendedRightShiftcharToshortBy8(i8 signext %a) nounwind readnone ssp {
43 ; CHECK-LABEL: extendedRightShiftcharToshortBy8:
44 ; CHECK: add [[REG:w[0-9]+]], w0, #1
45 ; CHECK: sxtb [[REG]], [[REG]]
46 ; CHECK: asr w0, [[REG]], #8
48 %conv1 = sext i8 %inc to i32
49 %shr4 = lshr i32 %conv1, 8
50 %conv2 = trunc i32 %shr4 to i16
54 define i32 @extendedLeftShiftcharTointBy4(i8 signext %a) nounwind readnone ssp {
56 ; CHECK-LABEL: extendedLeftShiftcharTointBy4:
57 ; CHECK: add [[REG:w[0-9]+]], w0, #1
58 ; CHECK: sbfiz w0, [[REG]], #4, #8
60 %conv = sext i8 %inc to i32
61 %shl = shl nsw i32 %conv, 4
65 define i32 @extendedRightShiftcharTointBy4(i8 signext %a) nounwind readnone ssp {
67 ; CHECK-LABEL: extendedRightShiftcharTointBy4:
68 ; CHECK: add [[REG:w[0-9]+]], w0, #1
69 ; CHECK: sbfx w0, [[REG]], #4, #4
71 %conv = sext i8 %inc to i32
72 %shr = ashr i32 %conv, 4
76 define i32 @extendedLeftShiftcharTointBy8(i8 signext %a) nounwind readnone ssp {
78 ; CHECK-LABEL: extendedLeftShiftcharTointBy8:
79 ; CHECK: add [[REG:w[0-9]+]], w0, #1
80 ; CHECK: sbfiz w0, [[REG]], #8, #8
82 %conv = sext i8 %inc to i32
83 %shl = shl nsw i32 %conv, 8
87 define i32 @extendedRightShiftcharTointBy8(i8 signext %a) nounwind readnone ssp {
89 ; CHECK-LABEL: extendedRightShiftcharTointBy8:
90 ; CHECK: add [[REG:w[0-9]+]], w0, #1
91 ; CHECK: sxtb [[REG]], [[REG]]
92 ; CHECK: asr w0, [[REG]], #8
94 %conv = sext i8 %inc to i32
95 %shr = ashr i32 %conv, 8
99 define i64 @extendedLeftShiftcharToint64By4(i8 signext %a) nounwind readnone ssp {
101 ; CHECK-LABEL: extendedLeftShiftcharToint64By4:
102 ; CHECK: add w[[REG:[0-9]+]], w0, #1
103 ; CHECK: sbfiz x0, x[[REG]], #4, #8
105 %conv = sext i8 %inc to i64
106 %shl = shl nsw i64 %conv, 4
110 define i64 @extendedRightShiftcharToint64By4(i8 signext %a) nounwind readnone ssp {
112 ; CHECK-LABEL: extendedRightShiftcharToint64By4:
113 ; CHECK: add w[[REG:[0-9]+]], w0, #1
114 ; CHECK: sbfx x0, x[[REG]], #4, #4
116 %conv = sext i8 %inc to i64
117 %shr = ashr i64 %conv, 4
121 define i64 @extendedLeftShiftcharToint64By8(i8 signext %a) nounwind readnone ssp {
123 ; CHECK-LABEL: extendedLeftShiftcharToint64By8:
124 ; CHECK: add w[[REG:[0-9]+]], w0, #1
125 ; CHECK: sbfiz x0, x[[REG]], #8, #8
127 %conv = sext i8 %inc to i64
128 %shl = shl nsw i64 %conv, 8
132 define i64 @extendedRightShiftcharToint64By8(i8 signext %a) nounwind readnone ssp {
134 ; CHECK-LABEL: extendedRightShiftcharToint64By8:
135 ; CHECK: add w[[REG:[0-9]+]], w0, #1
136 ; CHECK: sxtb x[[REG]], w[[REG]]
137 ; CHECK: asr x0, x[[REG]], #8
139 %conv = sext i8 %inc to i64
140 %shr = ashr i64 %conv, 8
144 define i32 @extendedLeftShiftshortTointBy4(i16 signext %a) nounwind readnone ssp {
146 ; CHECK-LABEL: extendedLeftShiftshortTointBy4:
147 ; CHECK: add [[REG:w[0-9]+]], w0, #1
148 ; CHECK: sbfiz w0, [[REG]], #4, #16
150 %conv = sext i16 %inc to i32
151 %shl = shl nsw i32 %conv, 4
155 define i32 @extendedRightShiftshortTointBy4(i16 signext %a) nounwind readnone ssp {
157 ; CHECK-LABEL: extendedRightShiftshortTointBy4:
158 ; CHECK: add [[REG:w[0-9]+]], w0, #1
159 ; CHECK: sbfx w0, [[REG]], #4, #12
161 %conv = sext i16 %inc to i32
162 %shr = ashr i32 %conv, 4
166 define i32 @extendedLeftShiftshortTointBy16(i16 signext %a) nounwind readnone ssp {
168 ; CHECK-LABEL: extendedLeftShiftshortTointBy16:
169 ; CHECK: lsl [[REG:w[0-9]+]], w0, #16
170 ; CHECK: add w0, [[REG]], #16, lsl #12
172 %conv2 = zext i16 %inc to i32
173 %shl = shl nuw i32 %conv2, 16
177 define i32 @extendedRightShiftshortTointBy16(i16 signext %a) nounwind readnone ssp {
179 ; CHECK-LABEL: extendedRightShiftshortTointBy16:
180 ; CHECK: add [[REG:w[0-9]+]], w0, #1
181 ; CHECK: sxth [[REG]], [[REG]]
182 ; CHECK: asr w0, [[REG]], #16
184 %conv = sext i16 %inc to i32
185 %shr = ashr i32 %conv, 16
189 define i64 @extendedLeftShiftshortToint64By4(i16 signext %a) nounwind readnone ssp {
191 ; CHECK-LABEL: extendedLeftShiftshortToint64By4:
192 ; CHECK: add w[[REG:[0-9]+]], w0, #1
193 ; CHECK: sbfiz x0, x[[REG]], #4, #16
195 %conv = sext i16 %inc to i64
196 %shl = shl nsw i64 %conv, 4
200 define i64 @extendedRightShiftshortToint64By4(i16 signext %a) nounwind readnone ssp {
202 ; CHECK-LABEL: extendedRightShiftshortToint64By4:
203 ; CHECK: add w[[REG:[0-9]+]], w0, #1
204 ; CHECK: sbfx x0, x[[REG]], #4, #12
206 %conv = sext i16 %inc to i64
207 %shr = ashr i64 %conv, 4
211 define i64 @extendedLeftShiftshortToint64By16(i16 signext %a) nounwind readnone ssp {
213 ; CHECK-LABEL: extendedLeftShiftshortToint64By16:
214 ; CHECK: add w[[REG:[0-9]+]], w0, #1
215 ; CHECK: sbfiz x0, x[[REG]], #16, #16
217 %conv = sext i16 %inc to i64
218 %shl = shl nsw i64 %conv, 16
222 define i64 @extendedRightShiftshortToint64By16(i16 signext %a) nounwind readnone ssp {
224 ; CHECK-LABEL: extendedRightShiftshortToint64By16:
225 ; CHECK: add w[[REG:[0-9]+]], w0, #1
226 ; CHECK: sxth x[[REG]], w[[REG]]
227 ; CHECK: asr x0, x[[REG]], #16
229 %conv = sext i16 %inc to i64
230 %shr = ashr i64 %conv, 16
234 define i64 @extendedLeftShiftintToint64By4(i32 %a) nounwind readnone ssp {
236 ; CHECK-LABEL: extendedLeftShiftintToint64By4:
237 ; CHECK: add w[[REG:[0-9]+]], w0, #1
238 ; CHECK: sbfiz x0, x[[REG]], #4, #32
239 %inc = add nsw i32 %a, 1
240 %conv = sext i32 %inc to i64
241 %shl = shl nsw i64 %conv, 4
245 define i64 @extendedRightShiftintToint64By4(i32 %a) nounwind readnone ssp {
247 ; CHECK-LABEL: extendedRightShiftintToint64By4:
248 ; CHECK: add w[[REG:[0-9]+]], w0, #1
249 ; CHECK: sbfx x0, x[[REG]], #4, #28
250 %inc = add nsw i32 %a, 1
251 %conv = sext i32 %inc to i64
252 %shr = ashr i64 %conv, 4
256 define i64 @extendedLeftShiftintToint64By32(i32 %a) nounwind readnone ssp {
258 ; CHECK-LABEL: extendedLeftShiftintToint64By32:
259 ; CHECK: add w[[REG:[0-9]+]], w0, #1
260 ; CHECK: lsl x0, x[[REG]], #32
261 %inc = add nsw i32 %a, 1
262 %conv2 = zext i32 %inc to i64
263 %shl = shl nuw i64 %conv2, 32
267 define i64 @extendedRightShiftintToint64By32(i32 %a) nounwind readnone ssp {
269 ; CHECK-LABEL: extendedRightShiftintToint64By32:
270 ; CHECK: add w[[REG:[0-9]+]], w0, #1
271 ; CHECK: sxtw x[[REG]], w[[REG]]
272 ; CHECK: asr x0, x[[REG]], #32
273 %inc = add nsw i32 %a, 1
274 %conv = sext i32 %inc to i64
275 %shr = ashr i64 %conv, 32