1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=arm-eabi -float-abi=soft -verify-machineinstrs < %s \
3 ; RUN: | FileCheck --check-prefixes=ARM %s
4 ; RUN: llc -mtriple=arm-eabi -float-abi=soft -verify-machineinstrs < %s \
5 ; RUN: | FileCheck --check-prefixes=NOLIB %s
7 ; Check Y = FNEG(X) -> Y = X ^ sign mask and no lib call is generated.
8 define void @test1(float* %a, float* %b) {
10 ; ARM: @ %bb.0: @ %entry
11 ; ARM-NEXT: ldr r1, [r1]
12 ; ARM-NEXT: eor r1, r1, #-2147483648
13 ; ARM-NEXT: str r1, [r0]
14 ; ARM-NEXT: mov pc, lr
17 ; NOLIB-NOT: bl __aeabi_fsub
19 %0 = load float, float* %b
21 store float %neg, float* %a
25 define void @test2(double* %a, double* %b) {
27 ; ARM: @ %bb.0: @ %entry
28 ; ARM-NEXT: ldr r2, [r1]
29 ; ARM-NEXT: ldr r1, [r1, #4]
30 ; ARM-NEXT: str r2, [r0]
31 ; ARM-NEXT: eor r1, r1, #-2147483648
32 ; ARM-NEXT: str r1, [r0, #4]
33 ; ARM-NEXT: mov pc, lr
36 ; NOLIB-NOT: bl __aeabi_dsub
38 %0 = load double, double* %b
40 store double %neg, double* %a
44 define void @test3(fp128* %a, fp128* %b) {
46 ; ARM: @ %bb.0: @ %entry
47 ; ARM-NEXT: ldm r1, {r2, r3, r12}
48 ; ARM-NEXT: ldr r1, [r1, #12]
49 ; ARM-NEXT: stm r0, {r2, r3, r12}
50 ; ARM-NEXT: eor r1, r1, #-2147483648
51 ; ARM-NEXT: str r1, [r0, #12]
52 ; ARM-NEXT: mov pc, lr
55 ; NOLIB-NOT: bl __subtf3
57 %0 = load fp128, fp128* %b
59 store fp128 %neg, fp128* %a