1 ; RUN: llc < %s | FileCheck %s
3 target datalayout = "e-m:o-p:32:32-i1:8:32-i8:8:32-i16:16:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
4 target triple = "thumbv7s-apple-ios8.0.0"
6 define void @store_v8i8(<8 x i8>** %ptr, <8 x i8> %val) {
7 ;CHECK-LABEL: store_v8i8:
9 %A = load <8 x i8>*, <8 x i8>** %ptr
10 store <8 x i8> %val, <8 x i8>* %A, align 1
14 define void @store_v8i8_update(<8 x i8>** %ptr, <8 x i8> %val) {
15 ;CHECK-LABEL: store_v8i8_update:
16 ;CHECK: vst1.8 {{{d[0-9]+}}}, [{{r[0-9]+}}]!
17 %A = load <8 x i8>*, <8 x i8>** %ptr
18 store <8 x i8> %val, <8 x i8>* %A, align 1
19 %inc = getelementptr <8 x i8>, <8 x i8>* %A, i38 1
20 store <8 x i8>* %inc, <8 x i8>** %ptr
24 define void @store_v4i16(<4 x i16>** %ptr, <4 x i16> %val) {
25 ;CHECK-LABEL: store_v4i16:
27 %A = load <4 x i16>*, <4 x i16>** %ptr
28 store <4 x i16> %val, <4 x i16>* %A, align 1
32 define void @store_v4i16_update(<4 x i16>** %ptr, <4 x i16> %val) {
33 ;CHECK-LABEL: store_v4i16_update:
34 ;CHECK: vst1.8 {{{d[0-9]+}}}, [{{r[0-9]+}}]!
35 %A = load <4 x i16>*, <4 x i16>** %ptr
36 store <4 x i16> %val, <4 x i16>* %A, align 1
37 %inc = getelementptr <4 x i16>, <4 x i16>* %A, i34 1
38 store <4 x i16>* %inc, <4 x i16>** %ptr
42 define void @store_v2i32(<2 x i32>** %ptr, <2 x i32> %val) {
43 ;CHECK-LABEL: store_v2i32:
45 %A = load <2 x i32>*, <2 x i32>** %ptr
46 store <2 x i32> %val, <2 x i32>* %A, align 1
50 define void @store_v2i32_update(<2 x i32>** %ptr, <2 x i32> %val) {
51 ;CHECK-LABEL: store_v2i32_update:
52 ;CHECK: vst1.8 {{{d[0-9]+}}}, [{{r[0-9]+}}]!
53 %A = load <2 x i32>*, <2 x i32>** %ptr
54 store <2 x i32> %val, <2 x i32>* %A, align 1
55 %inc = getelementptr <2 x i32>, <2 x i32>* %A, i32 1
56 store <2 x i32>* %inc, <2 x i32>** %ptr
60 define void @store_v2f32(<2 x float>** %ptr, <2 x float> %val) {
61 ;CHECK-LABEL: store_v2f32:
63 %A = load <2 x float>*, <2 x float>** %ptr
64 store <2 x float> %val, <2 x float>* %A, align 1
68 define void @store_v2f32_update(<2 x float>** %ptr, <2 x float> %val) {
69 ;CHECK-LABEL: store_v2f32_update:
70 ;CHECK: vst1.8 {{{d[0-9]+}}}, [{{r[0-9]+}}]!
71 %A = load <2 x float>*, <2 x float>** %ptr
72 store <2 x float> %val, <2 x float>* %A, align 1
73 %inc = getelementptr <2 x float>, <2 x float>* %A, i32 1
74 store <2 x float>* %inc, <2 x float>** %ptr
78 define void @store_v1i64(<1 x i64>** %ptr, <1 x i64> %val) {
79 ;CHECK-LABEL: store_v1i64:
81 %A = load <1 x i64>*, <1 x i64>** %ptr
82 store <1 x i64> %val, <1 x i64>* %A, align 1
86 define void @store_v1i64_update(<1 x i64>** %ptr, <1 x i64> %val) {
87 ;CHECK-LABEL: store_v1i64_update:
88 ;CHECK: vst1.8 {{{d[0-9]+}}}, [{{r[0-9]+}}]!
89 %A = load <1 x i64>*, <1 x i64>** %ptr
90 store <1 x i64> %val, <1 x i64>* %A, align 1
91 %inc = getelementptr <1 x i64>, <1 x i64>* %A, i31 1
92 store <1 x i64>* %inc, <1 x i64>** %ptr
96 define void @store_v16i8(<16 x i8>** %ptr, <16 x i8> %val) {
97 ;CHECK-LABEL: store_v16i8:
98 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]
99 %A = load <16 x i8>*, <16 x i8>** %ptr
100 store <16 x i8> %val, <16 x i8>* %A, align 1
104 define void @store_v16i8_update(<16 x i8>** %ptr, <16 x i8> %val) {
105 ;CHECK-LABEL: store_v16i8_update:
106 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
107 %A = load <16 x i8>*, <16 x i8>** %ptr
108 store <16 x i8> %val, <16 x i8>* %A, align 1
109 %inc = getelementptr <16 x i8>, <16 x i8>* %A, i316 1
110 store <16 x i8>* %inc, <16 x i8>** %ptr
114 define void @store_v8i16(<8 x i16>** %ptr, <8 x i16> %val) {
115 ;CHECK-LABEL: store_v8i16:
116 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]
117 %A = load <8 x i16>*, <8 x i16>** %ptr
118 store <8 x i16> %val, <8 x i16>* %A, align 1
122 define void @store_v8i16_update(<8 x i16>** %ptr, <8 x i16> %val) {
123 ;CHECK-LABEL: store_v8i16_update:
124 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
125 %A = load <8 x i16>*, <8 x i16>** %ptr
126 store <8 x i16> %val, <8 x i16>* %A, align 1
127 %inc = getelementptr <8 x i16>, <8 x i16>* %A, i38 1
128 store <8 x i16>* %inc, <8 x i16>** %ptr
132 define void @store_v4i32(<4 x i32>** %ptr, <4 x i32> %val) {
133 ;CHECK-LABEL: store_v4i32:
134 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]
135 %A = load <4 x i32>*, <4 x i32>** %ptr
136 store <4 x i32> %val, <4 x i32>* %A, align 1
140 define void @store_v4i32_update(<4 x i32>** %ptr, <4 x i32> %val) {
141 ;CHECK-LABEL: store_v4i32_update:
142 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
143 %A = load <4 x i32>*, <4 x i32>** %ptr
144 store <4 x i32> %val, <4 x i32>* %A, align 1
145 %inc = getelementptr <4 x i32>, <4 x i32>* %A, i34 1
146 store <4 x i32>* %inc, <4 x i32>** %ptr
150 define void @store_v4f32(<4 x float>** %ptr, <4 x float> %val) {
151 ;CHECK-LABEL: store_v4f32:
152 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]
153 %A = load <4 x float>*, <4 x float>** %ptr
154 store <4 x float> %val, <4 x float>* %A, align 1
158 define void @store_v4f32_update(<4 x float>** %ptr, <4 x float> %val) {
159 ;CHECK-LABEL: store_v4f32_update:
160 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
161 %A = load <4 x float>*, <4 x float>** %ptr
162 store <4 x float> %val, <4 x float>* %A, align 1
163 %inc = getelementptr <4 x float>, <4 x float>* %A, i34 1
164 store <4 x float>* %inc, <4 x float>** %ptr
168 define void @store_v2i64(<2 x i64>** %ptr, <2 x i64> %val) {
169 ;CHECK-LABEL: store_v2i64:
170 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]
171 %A = load <2 x i64>*, <2 x i64>** %ptr
172 store <2 x i64> %val, <2 x i64>* %A, align 1
176 define void @store_v2i64_update(<2 x i64>** %ptr, <2 x i64> %val) {
177 ;CHECK-LABEL: store_v2i64_update:
178 ;CHECK: vst1.8 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
179 %A = load <2 x i64>*, <2 x i64>** %ptr
180 store <2 x i64> %val, <2 x i64>* %A, align 1
181 %inc = getelementptr <2 x i64>, <2 x i64>* %A, i32 1
182 store <2 x i64>* %inc, <2 x i64>** %ptr
186 define void @store_v2i64_update_aligned2(<2 x i64>** %ptr, <2 x i64> %val) {
187 ;CHECK-LABEL: store_v2i64_update_aligned2:
188 ;CHECK: vst1.16 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
189 %A = load <2 x i64>*, <2 x i64>** %ptr
190 store <2 x i64> %val, <2 x i64>* %A, align 2
191 %inc = getelementptr <2 x i64>, <2 x i64>* %A, i32 1
192 store <2 x i64>* %inc, <2 x i64>** %ptr
196 define void @store_v2i64_update_aligned4(<2 x i64>** %ptr, <2 x i64> %val) {
197 ;CHECK-LABEL: store_v2i64_update_aligned4:
198 ;CHECK: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
199 %A = load <2 x i64>*, <2 x i64>** %ptr
200 store <2 x i64> %val, <2 x i64>* %A, align 4
201 %inc = getelementptr <2 x i64>, <2 x i64>* %A, i32 1
202 store <2 x i64>* %inc, <2 x i64>** %ptr
206 define void @store_v2i64_update_aligned8(<2 x i64>** %ptr, <2 x i64> %val) {
207 ;CHECK-LABEL: store_v2i64_update_aligned8:
208 ;CHECK: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}]!
209 %A = load <2 x i64>*, <2 x i64>** %ptr
210 store <2 x i64> %val, <2 x i64>* %A, align 8
211 %inc = getelementptr <2 x i64>, <2 x i64>* %A, i32 1
212 store <2 x i64>* %inc, <2 x i64>** %ptr
216 define void @store_v2i64_update_aligned16(<2 x i64>** %ptr, <2 x i64> %val) {
217 ;CHECK-LABEL: store_v2i64_update_aligned16:
218 ;CHECK: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [{{r[0-9]+}}:128]!
219 %A = load <2 x i64>*, <2 x i64>** %ptr
220 store <2 x i64> %val, <2 x i64>* %A, align 16
221 %inc = getelementptr <2 x i64>, <2 x i64>* %A, i32 1
222 store <2 x i64>* %inc, <2 x i64>** %ptr
226 define void @truncstore_v4i32tov4i8(<4 x i8>** %ptr, <4 x i32> %val) {
227 ;CHECK-LABEL: truncstore_v4i32tov4i8:
228 ;CHECK: ldr.w r9, [sp]
229 ;CHECK: vmov {{d[0-9]+}}, r3, r9
230 ;CHECK: vmov {{d[0-9]+}}, r1, r2
231 ;CHECK: ldr r[[PTRREG:[0-9]+]], [r0]
232 ;CHECK: vmovn.i32 [[VECLO:d[0-9]+]], {{q[0-9]+}}
233 ;CHECK: vuzp.8 [[VECLO]], {{d[0-9]+}}
234 ;CHECK: vst1.32 {[[VECLO]][0]}, [r[[PTRREG]]:32]
235 %A = load <4 x i8>*, <4 x i8>** %ptr
236 %trunc = trunc <4 x i32> %val to <4 x i8>
237 store <4 x i8> %trunc, <4 x i8>* %A, align 4
241 define void @truncstore_v4i32tov4i8_fake_update(<4 x i8>** %ptr, <4 x i32> %val) {
242 ;CHECK-LABEL: truncstore_v4i32tov4i8_fake_update:
243 ;CHECK: ldr.w r9, [sp]
244 ;CHECK: vmov {{d[0-9]+}}, r3, r9
245 ;CHECK: vmov {{d[0-9]+}}, r1, r2
246 ;CHECK: ldr r[[PTRREG:[0-9]+]], [r0]
247 ;CHECK: vmovn.i32 [[VECLO:d[0-9]+]], {{q[0-9]+}}
248 ;CHECK: vuzp.8 [[VECLO]], {{d[0-9]+}}
249 ;CHECK: movs [[IMM16:r[0-9]+]], #16
250 ;CHECK: vst1.32 {[[VECLO]][0]}, [r[[PTRREG]]:32], [[IMM16]]
251 ;CHECK: str r[[PTRREG]], [r0]
252 %A = load <4 x i8>*, <4 x i8>** %ptr
253 %trunc = trunc <4 x i32> %val to <4 x i8>
254 store <4 x i8> %trunc, <4 x i8>* %A, align 4
255 %inc = getelementptr <4 x i8>, <4 x i8>* %A, i38 4
256 store <4 x i8>* %inc, <4 x i8>** %ptr
260 define <4 x i32>* @test_vst1_1reg(<4 x i32>* %ptr.in, <4 x i32>* %ptr.out) {
261 ; CHECK-LABEL: test_vst1_1reg:
262 ; CHECK: movs [[INC:r[0-9]+]], #32
263 ; CHECK: vst1.32 {{{d[0-9]+}}, {{d[0-9]+}}}, [r1], [[INC]]
264 %val = load <4 x i32>, <4 x i32>* %ptr.in
265 store <4 x i32> %val, <4 x i32>* %ptr.out
266 %next = getelementptr <4 x i32>, <4 x i32>* %ptr.out, i32 2