1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -march=aarch64 -run-pass=legalizer %s -o - -verify-machineinstrs | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64"
7 define i32 @load_store_test(i24* %ptr, i24* %ptr2) {
8 %val = load i24, i24* %ptr
9 store i24 %val, i24* %ptr2
17 tracksRegLiveness: true
22 ; CHECK-LABEL: name: load_store_test
23 ; CHECK: liveins: $x0, $x1
24 ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
25 ; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY $x1
26 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
27 ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY]](p0) :: (load 2 from %ir.ptr, align 4)
28 ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
29 ; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C1]](s64)
30 ; CHECK: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p0) :: (load 1 from %ir.ptr + 2, align 4)
31 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
32 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LOAD1]], [[C2]](s32)
33 ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LOAD]]
34 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32)
35 ; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
36 ; CHECK: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY2]], [[C3]](s64)
37 ; CHECK: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY1]], [[C1]](s64)
38 ; CHECK: G_STORE [[COPY2]](s32), [[COPY1]](p0) :: (store 2 into %ir.ptr2, align 4)
39 ; CHECK: G_STORE [[LSHR]](s32), [[GEP1]](p0) :: (store 1 into %ir.ptr2 + 2, align 4)
40 ; CHECK: $w0 = COPY [[C]](s32)
41 ; CHECK: RET_ReallyLR implicit $w0
44 %3:_(s32) = G_CONSTANT i32 0
45 %2:_(s24) = G_LOAD %0(p0) :: (load 3 from %ir.ptr, align 4)
46 G_STORE %2(s24), %1(p0) :: (store 3 into %ir.ptr2, align 4)
48 RET_ReallyLR implicit $w0