[Alignment][NFC] migrate DataLayout internal struct to llvm::Align
[llvm-core.git] / test / CodeGen / AArch64 / GlobalISel / select-intrinsic-crypto-aesmc.mir
blob1e33c5b59b97cd1121d96b067fe9fa227fe76c92
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=aarch64-- -mattr=+fuse-aes -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
4 ---
5 # Check that we select the aarch64_crypto_aesmc and aarch64_crypto_aese
6 # intrinsics into an ARSMCrrTied and AESErr instruction sequence.
7 name:            aesmc_aese
8 legalized:       true
9 regBankSelected: true
11 body:             |
12   bb.0:
13     liveins: $q0, $q1
15     ; CHECK-LABEL: name: aesmc_aese
16     ; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
17     ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
18     ; CHECK: [[T0:%[0-9]+]]:fpr128 = AESErr [[COPY]], [[COPY1]]
19     ; CHECK: [[T1:%[0-9]+]]:fpr128 = AESMCrrTied [[T0]]
20     ; CHECK: $q0 = COPY [[T1]]
21     %0:fpr(<16 x s8>) = COPY $q0
22     %1:fpr(<16 x s8>) = COPY $q1
23     %2:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aese), %0, %1
24     %3:fpr(<16 x s8>) = G_INTRINSIC intrinsic(@llvm.aarch64.crypto.aesmc), %2
25     $q0 = COPY %3(<16 x s8>)
26 ...