[AMDGPU] Check for immediate SrcC in mfma in AsmParser
[llvm-core.git] / lib / Target / Lanai / MCTargetDesc / LanaiFixupKinds.h
blob1e692f8d31cb4972c3f92d83081868dea91268a8
1 //===-- LanaiFixupKinds.h - Lanai Specific Fixup Entries --------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIFIXUPKINDS_H
10 #define LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIFIXUPKINDS_H
12 #include "llvm/MC/MCFixup.h"
14 namespace llvm {
15 namespace Lanai {
16 // Although most of the current fixup types reflect a unique relocation
17 // one can have multiple fixup types for a given relocation and thus need
18 // to be uniquely named.
20 // This table *must* be in the save order of
21 // MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds]
22 // in LanaiAsmBackend.cpp.
24 enum Fixups {
25 // Results in R_Lanai_NONE
26 FIXUP_LANAI_NONE = FirstTargetFixupKind,
28 FIXUP_LANAI_21, // 21-bit symbol relocation
29 FIXUP_LANAI_21_F, // 21-bit symbol relocation, last two bits masked to 0
30 FIXUP_LANAI_25, // 25-bit branch targets
31 FIXUP_LANAI_32, // general 32-bit relocation
32 FIXUP_LANAI_HI16, // upper 16-bits of a symbolic relocation
33 FIXUP_LANAI_LO16, // lower 16-bits of a symbolic relocation
35 // Marker
36 LastTargetFixupKind,
37 NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
39 } // namespace Lanai
40 } // namespace llvm
42 #endif // LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIFIXUPKINDS_H