[AMDGPU] Check for immediate SrcC in mfma in AsmParser
[llvm-core.git] / lib / Target / MSP430 / MCTargetDesc / MSP430AsmBackend.cpp
blob365e5da74de06df0a365cdcacb5404d6388ca573
1 //===-- MSP430AsmBackend.cpp - MSP430 Assembler Backend -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "MCTargetDesc/MSP430FixupKinds.h"
10 #include "MCTargetDesc/MSP430MCTargetDesc.h"
11 #include "llvm/ADT/APInt.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCContext.h"
15 #include "llvm/MC/MCDirectives.h"
16 #include "llvm/MC/MCELFObjectWriter.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCFixupKindInfo.h"
19 #include "llvm/MC/MCObjectWriter.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbol.h"
22 #include "llvm/MC/MCTargetOptions.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
26 using namespace llvm;
28 namespace {
29 class MSP430AsmBackend : public MCAsmBackend {
30 uint8_t OSABI;
32 uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
33 MCContext &Ctx) const;
35 public:
36 MSP430AsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI)
37 : MCAsmBackend(support::little), OSABI(OSABI) {}
38 ~MSP430AsmBackend() override {}
40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
41 const MCValue &Target, MutableArrayRef<char> Data,
42 uint64_t Value, bool IsResolved,
43 const MCSubtargetInfo *STI) const override;
45 std::unique_ptr<MCObjectTargetWriter>
46 createObjectTargetWriter() const override {
47 return createMSP430ELFObjectWriter(OSABI);
50 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
51 const MCRelaxableFragment *DF,
52 const MCAsmLayout &Layout) const override {
53 return false;
56 bool fixupNeedsRelaxationAdvanced(const MCFixup &Fixup, bool Resolved,
57 uint64_t Value,
58 const MCRelaxableFragment *DF,
59 const MCAsmLayout &Layout,
60 const bool WasForced) const override {
61 return false;
64 unsigned getNumFixupKinds() const override {
65 return MSP430::NumTargetFixupKinds;
68 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
69 const static MCFixupKindInfo Infos[MSP430::NumTargetFixupKinds] = {
70 // This table must be in the same order of enum in MSP430FixupKinds.h.
72 // name offset bits flags
73 {"fixup_32", 0, 32, 0},
74 {"fixup_10_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
75 {"fixup_16", 0, 16, 0},
76 {"fixup_16_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
77 {"fixup_16_byte", 0, 16, 0},
78 {"fixup_16_pcrel_byte", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
79 {"fixup_2x_pcrel", 0, 10, MCFixupKindInfo::FKF_IsPCRel},
80 {"fixup_rl_pcrel", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
81 {"fixup_8", 0, 8, 0},
82 {"fixup_sym_diff", 0, 32, 0},
84 static_assert((array_lengthof(Infos)) == MSP430::NumTargetFixupKinds,
85 "Not all fixup kinds added to Infos array");
87 if (Kind < FirstTargetFixupKind)
88 return MCAsmBackend::getFixupKindInfo(Kind);
90 return Infos[Kind - FirstTargetFixupKind];
93 bool mayNeedRelaxation(const MCInst &Inst,
94 const MCSubtargetInfo &STI) const override {
95 return false;
98 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
99 MCInst &Res) const override {}
101 bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
104 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup,
105 uint64_t Value,
106 MCContext &Ctx) const {
107 unsigned Kind = Fixup.getKind();
108 switch (Kind) {
109 case MSP430::fixup_10_pcrel: {
110 if (Value & 0x1)
111 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");
113 // Offset is signed
114 int16_t Offset = Value;
115 // Jumps are in words
116 Offset >>= 1;
117 // PC points to the next instruction so decrement by one
118 --Offset;
120 if (Offset < -512 || Offset > 511)
121 Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
123 // Mask 10 bits
124 Offset &= 0x3ff;
126 return Offset;
128 default:
129 return Value;
133 void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
134 const MCValue &Target,
135 MutableArrayRef<char> Data,
136 uint64_t Value, bool IsResolved,
137 const MCSubtargetInfo *STI) const {
138 Value = adjustFixupValue(Fixup, Value, Asm.getContext());
139 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
140 if (!Value)
141 return; // Doesn't change encoding.
143 // Shift the value into position.
144 Value <<= Info.TargetOffset;
146 unsigned Offset = Fixup.getOffset();
147 unsigned NumBytes = alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
149 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
151 // For each byte of the fragment that the fixup touches, mask in the
152 // bits from the fixup value.
153 for (unsigned i = 0; i != NumBytes; ++i) {
154 Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
158 bool MSP430AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
159 if ((Count % 2) != 0)
160 return false;
162 // The canonical nop on MSP430 is mov #0, r3
163 uint64_t NopCount = Count / 2;
164 while (NopCount--)
165 OS.write("\x03\x43", 2);
167 return true;
170 } // end anonymous namespace
172 MCAsmBackend *llvm::createMSP430MCAsmBackend(const Target &T,
173 const MCSubtargetInfo &STI,
174 const MCRegisterInfo &MRI,
175 const MCTargetOptions &Options) {
176 return new MSP430AsmBackend(STI, ELF::ELFOSABI_STANDALONE);