[AMDGPU] Check for immediate SrcC in mfma in AsmParser
[llvm-core.git] / lib / Target / X86 / X86LegalizerInfo.h
blob7a0f13fb5ae6c69d7ac9c1b2d867eb60cb625b52
1 //===- X86LegalizerInfo.h ------------------------------------------*- C++
2 //-*-==//
3 //
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file declares the targeting of the Machinelegalizer class for X86.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
15 #define LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
17 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
19 namespace llvm {
21 class X86Subtarget;
22 class X86TargetMachine;
24 /// This class provides the information for the target register banks.
25 class X86LegalizerInfo : public LegalizerInfo {
26 private:
27 /// Keep a reference to the X86Subtarget around so that we can
28 /// make the right decision when generating code for different targets.
29 const X86Subtarget &Subtarget;
30 const X86TargetMachine &TM;
32 public:
33 X86LegalizerInfo(const X86Subtarget &STI, const X86TargetMachine &TM);
35 bool legalizeIntrinsic(MachineInstr &MI, MachineRegisterInfo &MRI,
36 MachineIRBuilder &MIRBuilder) const override;
38 private:
39 void setLegalizerInfo32bit();
40 void setLegalizerInfo64bit();
41 void setLegalizerInfoSSE1();
42 void setLegalizerInfoSSE2();
43 void setLegalizerInfoSSE41();
44 void setLegalizerInfoAVX();
45 void setLegalizerInfoAVX2();
46 void setLegalizerInfoAVX512();
47 void setLegalizerInfoAVX512DQ();
48 void setLegalizerInfoAVX512BW();
50 } // namespace llvm
51 #endif