1 //===-- Latency.cpp ---------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
12 #include "Assembler.h"
13 #include "BenchmarkRunner.h"
14 #include "MCInstrDescView.h"
15 #include "PerfHelper.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstBuilder.h"
19 #include "llvm/Support/FormatVariadic.h"
23 LatencySnippetGenerator::~LatencySnippetGenerator() = default;
25 llvm::Expected
<CodeTemplate
>
26 LatencySnippetGenerator::generateTwoInstructionPrototype(
27 const Instruction
&Instr
) const {
28 std::vector
<unsigned> Opcodes
;
29 Opcodes
.resize(State
.getInstrInfo().getNumOpcodes());
30 std::iota(Opcodes
.begin(), Opcodes
.end(), 0U);
31 std::shuffle(Opcodes
.begin(), Opcodes
.end(), randomGenerator());
32 for (const unsigned OtherOpcode
: Opcodes
) {
33 if (OtherOpcode
== Instr
.Description
->Opcode
)
35 const auto &OtherInstrDesc
= State
.getInstrInfo().get(OtherOpcode
);
36 const Instruction
OtherInstr(OtherInstrDesc
, RATC
);
37 if (OtherInstr
.hasMemoryOperands())
39 const AliasingConfigurations
Forward(Instr
, OtherInstr
);
40 const AliasingConfigurations
Back(OtherInstr
, Instr
);
41 if (Forward
.empty() || Back
.empty())
43 InstructionTemplate
ThisIT(Instr
);
44 InstructionTemplate
OtherIT(OtherInstr
);
45 if (!Forward
.hasImplicitAliasing())
46 setRandomAliasing(Forward
, ThisIT
, OtherIT
);
47 if (!Back
.hasImplicitAliasing())
48 setRandomAliasing(Back
, OtherIT
, ThisIT
);
50 CT
.Info
= llvm::formatv("creating cycle through {0}.",
51 State
.getInstrInfo().getName(OtherOpcode
));
52 CT
.Instructions
.push_back(std::move(ThisIT
));
53 CT
.Instructions
.push_back(std::move(OtherIT
));
56 return llvm::make_error
<BenchmarkFailure
>(
57 "Infeasible : Didn't find any scheme to make the instruction serial");
60 llvm::Expected
<CodeTemplate
>
61 LatencySnippetGenerator::generateCodeTemplate(unsigned Opcode
) const {
62 const Instruction
Instr(State
.getInstrInfo().get(Opcode
), RATC
);
63 if (Instr
.hasMemoryOperands())
64 return llvm::make_error
<BenchmarkFailure
>(
65 "Infeasible : has memory operands");
66 if (auto CT
= generateSelfAliasingCodeTemplate(Instr
))
69 llvm::consumeError(CT
.takeError());
70 // No self aliasing, trying to create a dependency through another opcode.
71 return generateTwoInstructionPrototype(Instr
);
74 const char *LatencyBenchmarkRunner::getCounterName() const {
75 if (!State
.getSubtargetInfo().getSchedModel().hasExtraProcessorInfo())
76 llvm::report_fatal_error("sched model is missing extra processor info!");
77 const char *CounterName
= State
.getSubtargetInfo()
79 .getExtraProcessorInfo()
80 .PfmCounters
.CycleCounter
;
82 llvm::report_fatal_error("sched model does not define a cycle counter");
86 LatencyBenchmarkRunner::~LatencyBenchmarkRunner() = default;
88 std::vector
<BenchmarkMeasure
>
89 LatencyBenchmarkRunner::runMeasurements(const ExecutableFunction
&Function
,
90 ScratchSpace
&Scratch
) const {
91 // Cycle measurements include some overhead from the kernel. Repeat the
92 // measure several times and take the minimum value.
93 constexpr const int NumMeasurements
= 30;
94 int64_t MinLatency
= std::numeric_limits
<int64_t>::max();
95 const char *CounterName
= getCounterName();
97 llvm::report_fatal_error("could not determine cycle counter name");
98 const pfm::PerfEvent
CyclesPerfEvent(CounterName
);
99 if (!CyclesPerfEvent
.valid())
100 llvm::report_fatal_error("invalid perf event");
101 for (size_t I
= 0; I
< NumMeasurements
; ++I
) {
102 pfm::Counter
Counter(CyclesPerfEvent
);
105 Function(Scratch
.ptr());
107 const int64_t Value
= Counter
.read();
108 if (Value
< MinLatency
)
111 return {BenchmarkMeasure::Create("latency", MinLatency
)};
114 } // namespace exegesis