1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
3 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
6 define void @e_single_precision() {entry: ret void}
7 define void @e_double_precision() {entry: ret void}
11 name: e_single_precision
15 tracksRegLiveness: true
18 ; FP32-LABEL: name: e_single_precision
19 ; FP32: [[LUi:%[0-9]+]]:gpr32 = LUi 16429
20 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
21 ; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
22 ; FP32: $f0 = COPY [[MTC1_]]
23 ; FP32: RetRA implicit $f0
24 ; FP64-LABEL: name: e_single_precision
25 ; FP64: [[LUi:%[0-9]+]]:gpr32 = LUi 16429
26 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
27 ; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
28 ; FP64: $f0 = COPY [[MTC1_]]
29 ; FP64: RetRA implicit $f0
30 %0:fprb(s32) = G_FCONSTANT float 0x4005BF0A80000000
36 name: e_double_precision
40 tracksRegLiveness: true
43 ; FP32-LABEL: name: e_double_precision
44 ; FP32: [[LUi:%[0-9]+]]:gpr32 = LUi 16389
45 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
46 ; FP32: [[LUi1:%[0-9]+]]:gpr32 = LUi 35604
47 ; FP32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
48 ; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 [[ORi1]], [[ORi]]
49 ; FP32: $d0 = COPY [[BuildPairF64_]]
50 ; FP32: RetRA implicit $d0
51 ; FP64-LABEL: name: e_double_precision
52 ; FP64: [[LUi:%[0-9]+]]:gpr32 = LUi 16389
53 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
54 ; FP64: [[LUi1:%[0-9]+]]:gpr32 = LUi 35604
55 ; FP64: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
56 ; FP64: [[BuildPairF64_64_:%[0-9]+]]:fgr64 = BuildPairF64_64 [[ORi1]], [[ORi]]
57 ; FP64: $d0 = COPY [[BuildPairF64_64_]]
58 ; FP64: RetRA implicit $d0
59 %0:fprb(s64) = G_FCONSTANT double 0x4005BF0A8B145769