| blob | 9f07f742e972a82a36d9061cfe2a25f1d248b72a |
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
3 --- |
5 @.str = private unnamed_addr constant [11 x i8] c"string %s\0A\00", align 1
6 declare void @llvm.va_start(i8*) #0
7 declare void @llvm.va_copy(i8*, i8*) #0
8 declare i32 @printf(i8*, ...)
10 define void @testVaCopyArg(i8* %fmt, ...) {
11 entry:
12 %fmt.addr = alloca i8*, align 4
13 %ap = alloca i8*, align 4
14 %aq = alloca i8*, align 4
15 %s = alloca i8*, align 4
16 store i8* %fmt, i8** %fmt.addr, align 4
17 %ap1 = bitcast i8** %ap to i8*
18 call void @llvm.va_start(i8* %ap1)
19 %0 = bitcast i8** %aq to i8*
20 %1 = bitcast i8** %ap to i8*
21 call void @llvm.va_copy(i8* %0, i8* %1)
22 %argp.cur = load i8*, i8** %aq, align 4
23 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
24 store i8* %argp.next, i8** %aq, align 4
25 %2 = bitcast i8* %argp.cur to i8**
26 %3 = load i8*, i8** %2, align 4
27 store i8* %3, i8** %s, align 4
28 %4 = load i8*, i8** %s, align 4
29 %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i8* %4)
30 ret void
31 }
33 ...
34 ---
35 name: testVaCopyArg
36 alignment: 4
37 legalized: true
38 regBankSelected: true
39 tracksRegLiveness: true
40 liveins:
41 - { reg: '$a0' }
42 fixedStack:
43 - { id: 0, offset: 12, size: 4, alignment: 4, isImmutable: true }
44 - { id: 1, offset: 8, size: 4, alignment: 8, isImmutable: true }
45 - { id: 2, offset: 4, size: 4, alignment: 4, isImmutable: true }
46 - { id: 3, offset: 4, size: 4, alignment: 4, isImmutable: true }
47 stack:
48 - { id: 0, name: fmt.addr, size: 4, alignment: 4 }
49 - { id: 1, name: ap, size: 4, alignment: 4 }
50 - { id: 2, name: aq, size: 4, alignment: 4 }
51 - { id: 3, name: s, size: 4, alignment: 4 }
52 machineFunctionInfo: {}
53 body: |
54 bb.1.entry:
55 liveins: $a0, $a1, $a2, $a3
57 ; MIPS32-LABEL: name: testVaCopyArg
58 ; MIPS32: liveins: $a0, $a1, $a2, $a3
59 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
60 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
61 ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.1, 0
62 ; MIPS32: SW [[COPY1]], [[ADDiu]], 0 :: (store 4 into %fixed-stack.1)
63 ; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2
64 ; MIPS32: [[ADDiu1:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.2, 0
65 ; MIPS32: SW [[COPY2]], [[ADDiu1]], 0 :: (store 4 into %fixed-stack.2)
66 ; MIPS32: [[COPY3:%[0-9]+]]:gpr32 = COPY $a3
67 ; MIPS32: [[ADDiu2:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.3, 0
68 ; MIPS32: SW [[COPY3]], [[ADDiu2]], 0 :: (store 4 into %fixed-stack.3)
69 ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @.str
70 ; MIPS32: [[ADDiu3:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @.str
71 ; MIPS32: [[ADDiu4:%[0-9]+]]:gpr32 = ADDiu %stack.0.fmt.addr, 0
72 ; MIPS32: [[ADDiu5:%[0-9]+]]:gpr32 = ADDiu %stack.1.ap, 0
73 ; MIPS32: [[ADDiu6:%[0-9]+]]:gpr32 = ADDiu %stack.2.aq, 0
74 ; MIPS32: [[ADDiu7:%[0-9]+]]:gpr32 = ADDiu %stack.3.s, 0
75 ; MIPS32: SW [[COPY]], [[ADDiu4]], 0 :: (store 4 into %ir.fmt.addr)
76 ; MIPS32: [[LEA_ADDiu:%[0-9]+]]:gpr32 = LEA_ADDiu %stack.0.fmt.addr, 0
77 ; MIPS32: SW [[LEA_ADDiu]], [[ADDiu5]], 0
78 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu5]], 0 :: (load 4)
79 ; MIPS32: SW [[LW]], [[ADDiu6]], 0 :: (store 4)
80 ; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu6]], 0 :: (load 4 from %ir.aq)
81 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 4
82 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[LW1]], [[ORi]]
83 ; MIPS32: SW [[ADDu]], [[ADDiu6]], 0 :: (store 4 into %ir.aq)
84 ; MIPS32: [[LW2:%[0-9]+]]:gpr32 = LW [[LW1]], 0 :: (load 4 from %ir.2)
85 ; MIPS32: SW [[LW2]], [[ADDiu7]], 0 :: (store 4 into %ir.s)
86 ; MIPS32: [[LW3:%[0-9]+]]:gpr32 = LW [[ADDiu7]], 0 :: (load 4 from %ir.s)
87 ; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
88 ; MIPS32: $a0 = COPY [[ADDiu3]]
89 ; MIPS32: $a1 = COPY [[LW3]]
90 ; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
91 ; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
92 ; MIPS32: RetRA
93 %0:gprb(p0) = COPY $a0
94 %1:gprb(s32) = COPY $a1
95 %2:gprb(p0) = G_FRAME_INDEX %fixed-stack.2
96 G_STORE %1(s32), %2(p0) :: (store 4 into %fixed-stack.2)
97 %3:gprb(s32) = COPY $a2
98 %4:gprb(p0) = G_FRAME_INDEX %fixed-stack.1
99 G_STORE %3(s32), %4(p0) :: (store 4 into %fixed-stack.1)
100 %5:gprb(s32) = COPY $a3
101 %6:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
102 G_STORE %5(s32), %6(p0) :: (store 4 into %fixed-stack.0)
103 %18:gprb(p0) = G_GLOBAL_VALUE @.str
104 %17:gprb(p0) = COPY %18(p0)
105 %7:gprb(p0) = G_FRAME_INDEX %stack.0.fmt.addr
106 %8:gpr32(p0) = G_FRAME_INDEX %stack.1.ap
107 %9:gpr32(p0) = G_FRAME_INDEX %stack.2.aq
108 %10:gprb(p0) = G_FRAME_INDEX %stack.3.s
109 G_STORE %0(p0), %7(p0) :: (store 4 into %ir.fmt.addr)
110 G_VASTART %8(p0) :: (store 4 into %ir.ap1, align 1)
111 %19:gpr32 = LW %8(p0), 0 :: (load 4)
112 SW %19, %9(p0), 0 :: (store 4)
113 %11:gprb(p0) = G_LOAD %9(p0) :: (load 4 from %ir.aq)
114 %12:gprb(s32) = G_CONSTANT i32 4
115 %13:gprb(p0) = G_GEP %11, %12(s32)
116 G_STORE %13(p0), %9(p0) :: (store 4 into %ir.aq)
117 %14:gprb(p0) = G_LOAD %11(p0) :: (load 4 from %ir.2)
118 G_STORE %14(p0), %10(p0) :: (store 4 into %ir.s)
119 %15:gprb(p0) = G_LOAD %10(p0) :: (load 4 from %ir.s)
120 ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
121 $a0 = COPY %17(p0)
122 $a1 = COPY %15(p0)
123 JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
124 ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
125 RetRA
127 ...