| blob | 9b906cb2c12e609691e269a5ff6e8d2760260a49 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s
4 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
5 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s
6 ; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
7 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
8 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
9 ; RUN: -verify-machineinstrs < %s \
10 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
11 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
12 ; RUN: -verify-machineinstrs < %s \
13 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
14 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
15 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
16 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
17 ; RUN: -verify-machineinstrs < %s \
18 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
19 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
20 ; RUN: -verify-machineinstrs < %s \
21 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
22 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \
23 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s
25 ; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for
26 ; lp64/lp64f/lp64d. Different CHECK lines are required for RV32D due to slight
27 ; codegen differences due to the way the f64 load operations are lowered.
29 declare void @llvm.va_start(i8*)
30 declare void @llvm.va_end(i8*)
32 declare void @notdead(i8*)
34 ; Although frontends are recommended to not generate va_arg due to the lack of
35 ; support for aggregate types, we test simple cases here to ensure they are
36 ; lowered correctly
38 define i32 @va1(i8* %fmt, ...) nounwind {
39 ; ILP32-ILP32F-FPELIM-LABEL: va1:
40 ; ILP32-ILP32F-FPELIM: # %bb.0:
41 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
42 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
43 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
44 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
45 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
46 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
47 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
48 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
49 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
50 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
51 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
52 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
53 ; ILP32-ILP32F-FPELIM-NEXT: ret
54 ;
55 ; ILP32-ILP32F-WITHFP-LABEL: va1:
56 ; ILP32-ILP32F-WITHFP: # %bb.0:
57 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
58 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
59 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
60 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
61 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
62 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
63 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
64 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
65 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
66 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
67 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
68 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
69 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
70 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
71 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
72 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
73 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
74 ; ILP32-ILP32F-WITHFP-NEXT: ret
75 ;
76 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1:
77 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
78 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
79 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
80 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
81 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
82 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
83 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
84 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
85 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
86 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
87 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
88 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
89 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
90 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
91 ;
92 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1:
93 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
94 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
95 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
96 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
97 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
98 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
99 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
100 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
101 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
102 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
103 ; LP64-LP64F-LP64D-FPELIM-NEXT: ori a0, a0, 4
104 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
105 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 24(sp)
106 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
107 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
108 ;
109 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1:
110 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
111 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
112 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
113 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
114 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
115 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
116 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
117 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
118 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
119 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
120 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
121 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
122 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
123 ; LP64-LP64F-LP64D-WITHFP-NEXT: ori a0, a0, 4
124 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
125 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
126 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
127 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
128 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
129 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
130 %va = alloca i8*, align 4
131 %1 = bitcast i8** %va to i8*
132 call void @llvm.va_start(i8* %1)
133 %argp.cur = load i8*, i8** %va, align 4
134 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
135 store i8* %argp.next, i8** %va, align 4
136 %2 = bitcast i8* %argp.cur to i32*
137 %3 = load i32, i32* %2, align 4
138 call void @llvm.va_end(i8* %1)
139 ret i32 %3
140 }
142 define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
143 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg:
144 ; ILP32-ILP32F-FPELIM: # %bb.0:
145 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
146 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
147 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
148 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
149 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
150 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
151 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
152 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
153 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
154 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
155 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
156 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
157 ; ILP32-ILP32F-FPELIM-NEXT: ret
158 ;
159 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg:
160 ; ILP32-ILP32F-WITHFP: # %bb.0:
161 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
162 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
163 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
164 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
165 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
166 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
167 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
168 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
169 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
170 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
171 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
172 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
173 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
174 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
175 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
176 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
177 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
178 ; ILP32-ILP32F-WITHFP-NEXT: ret
179 ;
180 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg:
181 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
182 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
183 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
184 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
185 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
186 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
187 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
188 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
189 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
190 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
191 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
192 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
193 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
194 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
195 ;
196 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg:
197 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
198 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
199 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
200 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
201 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
202 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
203 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
204 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
205 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
206 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
207 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24
208 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
209 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
210 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
211 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
212 ;
213 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg:
214 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
215 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
216 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
217 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
218 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
219 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
220 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
221 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
222 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
223 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
224 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
225 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
226 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
227 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
228 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
229 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
230 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
231 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
232 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
233 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
234 %va = alloca i8*, align 4
235 %1 = bitcast i8** %va to i8*
236 call void @llvm.va_start(i8* %1)
237 %2 = va_arg i8** %va, i32
238 call void @llvm.va_end(i8* %1)
239 ret i32 %2
240 }
242 ; Ensure the adjustment when restoring the stack pointer using the frame
243 ; pointer is correct
244 define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
245 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg_alloca:
246 ; ILP32-ILP32F-FPELIM: # %bb.0:
247 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
248 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
249 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp)
250 ; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp)
251 ; ILP32-ILP32F-FPELIM-NEXT: addi s0, sp, 16
252 ; ILP32-ILP32F-FPELIM-NEXT: mv s1, a1
253 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(s0)
254 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(s0)
255 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(s0)
256 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(s0)
257 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(s0)
258 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 8(s0)
259 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(s0)
260 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, s0, 8
261 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0)
262 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15
263 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16
264 ; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0
265 ; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0
266 ; ILP32-ILP32F-FPELIM-NEXT: call notdead
267 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1
268 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16
269 ; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp)
270 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp)
271 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
272 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
273 ; ILP32-ILP32F-FPELIM-NEXT: ret
274 ;
275 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca:
276 ; ILP32-ILP32F-WITHFP: # %bb.0:
277 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
278 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
279 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
280 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp)
281 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
282 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
283 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
284 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
285 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
286 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
287 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
288 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
289 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
290 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
291 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
292 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15
293 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16
294 ; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0
295 ; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0
296 ; ILP32-ILP32F-WITHFP-NEXT: call notdead
297 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1
298 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16
299 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp)
300 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
301 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
302 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
303 ; ILP32-ILP32F-WITHFP-NEXT: ret
304 ;
305 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca:
306 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
307 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
308 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
309 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp)
310 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp)
311 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi s0, sp, 16
312 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s1, a1
313 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(s0)
314 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(s0)
315 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(s0)
316 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(s0)
317 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(s0)
318 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 8(s0)
319 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(s0)
320 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, s0, 8
321 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0)
322 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15
323 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16
324 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0
325 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0
326 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead
327 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1
328 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16
329 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp)
330 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp)
331 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
332 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
333 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
334 ;
335 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca:
336 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
337 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
338 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp)
339 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp)
340 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp)
341 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi s0, sp, 32
342 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s1, a1
343 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(s0)
344 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(s0)
345 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(s0)
346 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(s0)
347 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(s0)
348 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(s0)
349 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(s0)
350 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, s0, 8
351 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 8
352 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, -32(s0)
353 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a1, 32
354 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32
355 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15
356 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1
357 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 33
358 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -16
359 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1
360 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0
361 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0
362 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead
363 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1
364 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32
365 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp)
366 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp)
367 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp)
368 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
369 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
370 ;
371 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca:
372 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
373 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
374 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
375 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
376 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp)
377 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
378 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
379 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
380 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
381 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
382 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
383 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
384 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
385 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
386 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
387 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 8
388 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
389 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a1, 32
390 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32
391 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15
392 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1
393 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 33
394 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -16
395 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
396 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0
397 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0
398 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead
399 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1
400 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32
401 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp)
402 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
403 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
404 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
405 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
406 %va = alloca i8*, align 4
407 %1 = bitcast i8** %va to i8*
408 call void @llvm.va_start(i8* %1)
409 %2 = va_arg i8** %va, i32
410 %3 = alloca i8, i32 %2
411 call void @notdead(i8* %3)
412 call void @llvm.va_end(i8* %1)
413 ret i32 %2
414 }
416 define void @va1_caller() nounwind {
417 ; Pass a double, as a float would be promoted by a C/C++ frontend
418 ; ILP32-ILP32F-FPELIM-LABEL: va1_caller:
419 ; ILP32-ILP32F-FPELIM: # %bb.0:
420 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
421 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
422 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
423 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 2
424 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
425 ; ILP32-ILP32F-FPELIM-NEXT: call va1
426 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
427 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
428 ; ILP32-ILP32F-FPELIM-NEXT: ret
429 ;
430 ; ILP32-ILP32F-WITHFP-LABEL: va1_caller:
431 ; ILP32-ILP32F-WITHFP: # %bb.0:
432 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
433 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
434 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
435 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
436 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
437 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 2
438 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
439 ; ILP32-ILP32F-WITHFP-NEXT: call va1
440 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
441 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
442 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
443 ; ILP32-ILP32F-WITHFP-NEXT: ret
444 ;
445 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller:
446 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
447 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
448 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
449 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
450 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 2
451 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
452 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va1
453 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
454 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
455 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
456 ;
457 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_caller:
458 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
459 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
460 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
461 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
462 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
463 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 2
464 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va1
465 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
466 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
467 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
468 ;
469 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_caller:
470 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
471 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
472 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
473 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
474 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
475 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
476 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
477 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 2
478 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va1
479 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
480 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
481 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
482 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
483 %1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2)
484 ret void
485 }
487 ; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned"
488 ; register pair (where the first register is even-numbered).
490 define i64 @va2(i8 *%fmt, ...) nounwind {
491 ; ILP32-ILP32F-FPELIM-LABEL: va2:
492 ; ILP32-ILP32F-FPELIM: # %bb.0:
493 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
494 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
495 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
496 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
497 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
498 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
499 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
500 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
501 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
502 ; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8
503 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 35
504 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
505 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1)
506 ; ILP32-ILP32F-FPELIM-NEXT: ori a1, a1, 4
507 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a1)
508 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
509 ; ILP32-ILP32F-FPELIM-NEXT: ret
510 ;
511 ; ILP32-ILP32F-WITHFP-LABEL: va2:
512 ; ILP32-ILP32F-WITHFP: # %bb.0:
513 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
514 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
515 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
516 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
517 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
518 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
519 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
520 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
521 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
522 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
523 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
524 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
525 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
526 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 19
527 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
528 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
529 ; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4
530 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1)
531 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
532 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
533 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
534 ; ILP32-ILP32F-WITHFP-NEXT: ret
535 ;
536 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2:
537 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
538 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
539 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
540 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
541 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
542 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
543 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
544 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
545 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
546 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
547 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a1, a0, -8
548 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35
549 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
550 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a1)
551 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a1, a1, 4
552 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a1)
553 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
554 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
555 ;
556 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2:
557 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
558 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
559 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
560 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
561 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
562 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
563 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
564 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
565 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
566 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
567 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
568 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
569 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7
570 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32
571 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32
572 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
573 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
574 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1
575 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 32
576 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -8
577 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1
578 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
579 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
580 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
581 ;
582 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2:
583 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
584 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
585 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
586 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
587 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
588 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
589 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
590 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
591 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
592 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
593 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
594 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
595 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
596 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
597 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
598 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7
599 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32
600 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
601 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
602 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
603 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1
604 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32
605 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8
606 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
607 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
608 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
609 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
610 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
611 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
612 %va = alloca i8*, align 4
613 %1 = bitcast i8** %va to i8*
614 call void @llvm.va_start(i8* %1)
615 %2 = bitcast i8** %va to i32*
616 %argp.cur = load i32, i32* %2, align 4
617 %3 = add i32 %argp.cur, 7
618 %4 = and i32 %3, -8
619 %argp.cur.aligned = inttoptr i32 %3 to i8*
620 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
621 store i8* %argp.next, i8** %va, align 4
622 %5 = inttoptr i32 %4 to double*
623 %6 = load double, double* %5, align 8
624 %7 = bitcast double %6 to i64
625 call void @llvm.va_end(i8* %1)
626 ret i64 %7
627 }
629 define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
630 ; ILP32-ILP32F-FPELIM-LABEL: va2_va_arg:
631 ; ILP32-ILP32F-FPELIM: # %bb.0:
632 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
633 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
634 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
635 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
636 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
637 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
638 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
639 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
640 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
641 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
642 ; ILP32-ILP32F-FPELIM-NEXT: ori a1, a0, 4
643 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
644 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
645 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a1, 4
646 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 12(sp)
647 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a1)
648 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
649 ; ILP32-ILP32F-FPELIM-NEXT: ret
650 ;
651 ; ILP32-ILP32F-WITHFP-LABEL: va2_va_arg:
652 ; ILP32-ILP32F-WITHFP: # %bb.0:
653 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
654 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
655 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
656 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
657 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
658 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
659 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
660 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
661 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
662 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
663 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
664 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
665 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
666 ; ILP32-ILP32F-WITHFP-NEXT: ori a1, a0, 4
667 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
668 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
669 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a1, 4
670 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0)
671 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1)
672 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
673 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
674 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
675 ; ILP32-ILP32F-WITHFP-NEXT: ret
676 ;
677 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg:
678 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
679 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
680 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
681 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
682 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
683 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
684 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
685 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
686 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
687 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
688 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
689 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 8
690 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
691 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
692 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 0(sp)
693 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(sp)
694 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 4(sp)
695 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
696 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
697 ;
698 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_va_arg:
699 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
700 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
701 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
702 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
703 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
704 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
705 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
706 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
707 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
708 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
709 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24
710 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
711 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
712 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
713 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
714 ;
715 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_va_arg:
716 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
717 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
718 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
719 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
720 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
721 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
722 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
723 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
724 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
725 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
726 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
727 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
728 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
729 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
730 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
731 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
732 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
733 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
734 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
735 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
736 %va = alloca i8*, align 4
737 %1 = bitcast i8** %va to i8*
738 call void @llvm.va_start(i8* %1)
739 %2 = va_arg i8** %va, double
740 call void @llvm.va_end(i8* %1)
741 %3 = bitcast double %2 to i64
742 ret i64 %3
743 }
745 define void @va2_caller() nounwind {
746 ; ILP32-ILP32F-FPELIM-LABEL: va2_caller:
747 ; ILP32-ILP32F-FPELIM: # %bb.0:
748 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
749 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
750 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
751 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
752 ; ILP32-ILP32F-FPELIM-NEXT: call va2
753 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
754 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
755 ; ILP32-ILP32F-FPELIM-NEXT: ret
756 ;
757 ; ILP32-ILP32F-WITHFP-LABEL: va2_caller:
758 ; ILP32-ILP32F-WITHFP: # %bb.0:
759 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
760 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
761 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
762 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
763 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
764 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
765 ; ILP32-ILP32F-WITHFP-NEXT: call va2
766 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
767 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
768 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
769 ; ILP32-ILP32F-WITHFP-NEXT: ret
770 ;
771 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller:
772 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
773 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
774 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
775 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
776 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
777 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va2
778 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
779 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
780 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
781 ;
782 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_caller:
783 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
784 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
785 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
786 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
787 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
788 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va2
789 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
790 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
791 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
792 ;
793 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_caller:
794 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
795 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
796 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
797 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
798 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
799 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
800 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
801 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va2
802 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
803 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
804 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
805 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
806 %1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00)
807 ret void
808 }
810 ; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the
811 ; vararg double is passed in a4 and a5 (rather than a3 and a4)
813 define i64 @va3(i32 %a, i64 %b, ...) nounwind {
814 ; ILP32-ILP32F-FPELIM-LABEL: va3:
815 ; ILP32-ILP32F-FPELIM: # %bb.0:
816 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
817 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
818 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
819 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
820 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
821 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
822 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
823 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
824 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, sp, 27
825 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
826 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a0)
827 ; ILP32-ILP32F-FPELIM-NEXT: ori a0, a0, 4
828 ; ILP32-ILP32F-FPELIM-NEXT: lw a4, 0(a0)
829 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a3
830 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
831 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a4
832 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
833 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
834 ; ILP32-ILP32F-FPELIM-NEXT: ret
835 ;
836 ; ILP32-ILP32F-WITHFP-LABEL: va3:
837 ; ILP32-ILP32F-WITHFP: # %bb.0:
838 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
839 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp)
840 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp)
841 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
842 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
843 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
844 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
845 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
846 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
847 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
848 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
849 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, s0, 19
850 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
851 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0)
852 ; ILP32-ILP32F-WITHFP-NEXT: ori a0, a0, 4
853 ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0)
854 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3
855 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
856 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4
857 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
858 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp)
859 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp)
860 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
861 ; ILP32-ILP32F-WITHFP-NEXT: ret
862 ;
863 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3:
864 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
865 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32
866 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp)
867 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(sp)
868 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp)
869 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(sp)
870 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(sp)
871 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 19
872 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
873 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, sp, 27
874 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
875 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 0(a0)
876 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a0, a0, 4
877 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a4, 0(a0)
878 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3
879 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
880 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a4
881 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
882 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 32
883 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
884 ;
885 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3:
886 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
887 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
888 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
889 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
890 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
891 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
892 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
893 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16
894 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
895 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
896 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
897 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 7
898 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 32
899 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a2, a2, 32
900 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, 8
901 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
902 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 1
903 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a2, 32
904 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, -8
905 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a2
906 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
907 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a0
908 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
909 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
910 ;
911 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3:
912 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
913 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
914 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
915 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
916 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
917 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
918 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
919 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
920 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
921 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
922 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0
923 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
924 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
925 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
926 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 7
927 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 32
928 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a2, a2, 32
929 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8
930 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0)
931 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 1
932 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32
933 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8
934 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2
935 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
936 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0
937 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
938 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
939 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
940 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
941 %va = alloca i8*, align 4
942 %1 = bitcast i8** %va to i8*
943 call void @llvm.va_start(i8* %1)
944 %2 = bitcast i8** %va to i32*
945 %argp.cur = load i32, i32* %2, align 4
946 %3 = add i32 %argp.cur, 7
947 %4 = and i32 %3, -8
948 %argp.cur.aligned = inttoptr i32 %3 to i8*
949 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
950 store i8* %argp.next, i8** %va, align 4
951 %5 = inttoptr i32 %4 to double*
952 %6 = load double, double* %5, align 8
953 call void @llvm.va_end(i8* %1)
954 %7 = bitcast double %6 to i64
955 %8 = add i64 %b, %7
956 ret i64 %8
957 }
959 define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
960 ; ILP32-ILP32F-FPELIM-LABEL: va3_va_arg:
961 ; ILP32-ILP32F-FPELIM: # %bb.0:
962 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
963 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
964 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
965 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
966 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
967 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
968 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
969 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
970 ; ILP32-ILP32F-FPELIM-NEXT: ori a3, a0, 4
971 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
972 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
973 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, a3, 4
974 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 4(sp)
975 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a3)
976 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
977 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
978 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a3
979 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
980 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
981 ; ILP32-ILP32F-FPELIM-NEXT: ret
982 ;
983 ; ILP32-ILP32F-WITHFP-LABEL: va3_va_arg:
984 ; ILP32-ILP32F-WITHFP: # %bb.0:
985 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
986 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp)
987 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp)
988 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
989 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
990 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
991 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
992 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
993 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
994 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
995 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
996 ; ILP32-ILP32F-WITHFP-NEXT: ori a3, a0, 4
997 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
998 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
999 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, a3, 4
1000 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, -12(s0)
1001 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a3)
1002 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
1003 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
1004 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3
1005 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
1006 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp)
1007 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp)
1008 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1009 ; ILP32-ILP32F-WITHFP-NEXT: ret
1010 ;
1011 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg:
1012 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1013 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1014 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1015 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1016 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1017 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1018 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1019 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35
1020 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
1021 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 8
1022 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 20(sp)
1023 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
1024 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 8(sp)
1025 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 12(sp)
1026 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 8(sp)
1027 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a0
1028 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3
1029 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
1030 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
1031 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1032 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1033 ;
1034 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_va_arg:
1035 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1036 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
1037 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
1038 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
1039 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
1040 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
1041 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
1042 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
1043 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16
1044 ; LP64-LP64F-LP64D-FPELIM-NEXT: ori a3, a0, 8
1045 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a2
1046 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1047 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
1048 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1049 ;
1050 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_va_arg:
1051 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1052 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
1053 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
1054 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
1055 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1056 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
1057 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
1058 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
1059 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
1060 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
1061 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
1062 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0
1063 ; LP64-LP64F-LP64D-WITHFP-NEXT: ori a3, a0, 8
1064 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2
1065 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0)
1066 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
1067 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
1068 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
1069 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1070 %va = alloca i8*, align 4
1071 %1 = bitcast i8** %va to i8*
1072 call void @llvm.va_start(i8* %1)
1073 %2 = va_arg i8** %va, double
1074 call void @llvm.va_end(i8* %1)
1075 %3 = bitcast double %2 to i64
1076 %4 = add i64 %b, %3
1077 ret i64 %4
1078 }
1080 define void @va3_caller() nounwind {
1081 ; ILP32-ILP32F-FPELIM-LABEL: va3_caller:
1082 ; ILP32-ILP32F-FPELIM: # %bb.0:
1083 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
1084 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
1085 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 2
1086 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 1111
1087 ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 262144
1088 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
1089 ; ILP32-ILP32F-FPELIM-NEXT: mv a4, zero
1090 ; ILP32-ILP32F-FPELIM-NEXT: call va3
1091 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
1092 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
1093 ; ILP32-ILP32F-FPELIM-NEXT: ret
1094 ;
1095 ; ILP32-ILP32F-WITHFP-LABEL: va3_caller:
1096 ; ILP32-ILP32F-WITHFP: # %bb.0:
1097 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
1098 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
1099 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
1100 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1101 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 2
1102 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 1111
1103 ; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144
1104 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
1105 ; ILP32-ILP32F-WITHFP-NEXT: mv a4, zero
1106 ; ILP32-ILP32F-WITHFP-NEXT: call va3
1107 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
1108 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
1109 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
1110 ; ILP32-ILP32F-WITHFP-NEXT: ret
1111 ;
1112 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller:
1113 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1114 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
1115 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
1116 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 2
1117 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 1111
1118 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 262144
1119 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
1120 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a4, zero
1121 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va3
1122 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
1123 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
1124 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1125 ;
1126 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_caller:
1127 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1128 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
1129 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp)
1130 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1
1131 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 62
1132 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 2
1133 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1111
1134 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va3
1135 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp)
1136 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
1137 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1138 ;
1139 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_caller:
1140 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1141 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
1142 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp)
1143 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp)
1144 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
1145 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1
1146 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62
1147 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 2
1148 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1111
1149 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va3
1150 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp)
1151 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp)
1152 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
1153 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1154 %1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00)
1155 ret void
1156 }
1158 declare void @llvm.va_copy(i8*, i8*)
1160 define i32 @va4_va_copy(i32 %argno, ...) nounwind {
1161 ; ILP32-ILP32F-FPELIM-LABEL: va4_va_copy:
1162 ; ILP32-ILP32F-FPELIM: # %bb.0:
1163 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1164 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp)
1165 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp)
1166 ; ILP32-ILP32F-FPELIM-NEXT: mv s0, a1
1167 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1168 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1169 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1170 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1171 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1172 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1173 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1174 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 24
1175 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp)
1176 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1177 ; ILP32-ILP32F-FPELIM-NEXT: call notdead
1178 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 4(sp)
1179 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 3
1180 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1181 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a0, 4
1182 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(sp)
1183 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a0)
1184 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1185 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1186 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a0, 4
1187 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 4(sp)
1188 ; ILP32-ILP32F-FPELIM-NEXT: lw a2, 0(a0)
1189 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1190 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1191 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4
1192 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
1193 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
1194 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0
1195 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2
1196 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
1197 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp)
1198 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp)
1199 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1200 ; ILP32-ILP32F-FPELIM-NEXT: ret
1201 ;
1202 ; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy:
1203 ; ILP32-ILP32F-WITHFP: # %bb.0:
1204 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1205 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp)
1206 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp)
1207 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp)
1208 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 32
1209 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
1210 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1211 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1212 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1213 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1214 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1215 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1216 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1217 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
1218 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
1219 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1220 ; ILP32-ILP32F-WITHFP-NEXT: call notdead
1221 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, -16(s0)
1222 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 3
1223 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1224 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a0, 4
1225 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -16(s0)
1226 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a0)
1227 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1228 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1229 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a0, 4
1230 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -16(s0)
1231 ; ILP32-ILP32F-WITHFP-NEXT: lw a2, 0(a0)
1232 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1233 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1234 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4
1235 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0)
1236 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
1237 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1
1238 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2
1239 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
1240 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp)
1241 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp)
1242 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp)
1243 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1244 ; ILP32-ILP32F-WITHFP-NEXT: ret
1245 ;
1246 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy:
1247 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1248 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1249 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp)
1250 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp)
1251 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s0, a1
1252 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1253 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1254 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1255 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1256 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1257 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1258 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1259 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 24
1260 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 4(sp)
1261 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1262 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead
1263 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 4(sp)
1264 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 3
1265 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1266 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 4
1267 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(sp)
1268 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a0)
1269 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1270 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1271 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a0, 4
1272 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 4(sp)
1273 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a2, 0(a0)
1274 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1275 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1276 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4
1277 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
1278 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
1279 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0
1280 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2
1281 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
1282 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp)
1283 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp)
1284 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1285 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1286 ;
1287 ; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy:
1288 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1289 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
1290 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp)
1291 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp)
1292 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s0, a1
1293 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 88(sp)
1294 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 80(sp)
1295 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 72(sp)
1296 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 64(sp)
1297 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 56(sp)
1298 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 48(sp)
1299 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 40(sp)
1300 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 40
1301 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 8
1302 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1303 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 0(sp)
1304 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead
1305 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 8(sp)
1306 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 3
1307 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1308 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a0, 8
1309 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1310 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a1, 0(a0)
1311 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1312 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1313 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 8
1314 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
1315 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a2, 0(a0)
1316 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1317 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1318 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8
1319 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1320 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
1321 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, s0
1322 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a1, a1, a2
1323 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0
1324 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp)
1325 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp)
1326 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
1327 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1328 ;
1329 ; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy:
1330 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1331 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112
1332 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp)
1333 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp)
1334 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp)
1335 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1336 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
1337 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1338 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1339 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1340 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1341 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1342 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1343 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1344 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
1345 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 8
1346 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
1347 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -40(s0)
1348 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead
1349 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, -32(s0)
1350 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 3
1351 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1352 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a0, 8
1353 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -32(s0)
1354 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a1, 0(a0)
1355 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1356 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1357 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 8
1358 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -32(s0)
1359 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a2, 0(a0)
1360 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1361 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1362 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8
1363 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0)
1364 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
1365 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, s1
1366 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, a1, a2
1367 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0
1368 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp)
1369 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp)
1370 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp)
1371 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112
1372 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1373 %vargs = alloca i8*, align 4
1374 %wargs = alloca i8*, align 4
1375 %1 = bitcast i8** %vargs to i8*
1376 %2 = bitcast i8** %wargs to i8*
1377 call void @llvm.va_start(i8* %1)
1378 %3 = va_arg i8** %vargs, i32
1379 call void @llvm.va_copy(i8* %2, i8* %1)
1380 %4 = load i8*, i8** %wargs, align 4
1381 call void @notdead(i8* %4)
1382 %5 = va_arg i8** %vargs, i32
1383 %6 = va_arg i8** %vargs, i32
1384 %7 = va_arg i8** %vargs, i32
1385 call void @llvm.va_end(i8* %1)
1386 call void @llvm.va_end(i8* %2)
1387 %add1 = add i32 %5, %3
1388 %add2 = add i32 %add1, %6
1389 %add3 = add i32 %add2, %7
1390 ret i32 %add3
1391 }
1393 ; Check 2x*xlen values are aligned appropriately when passed on the stack in a vararg call
1395 declare i32 @va5_aligned_stack_callee(i32, ...)
1397 define void @va5_aligned_stack_caller() nounwind {
1398 ; The double should be 8-byte aligned on the stack, but the two-element array
1399 ; should only be 4-byte aligned
1400 ; ILP32-ILP32F-FPELIM-LABEL: va5_aligned_stack_caller:
1401 ; ILP32-ILP32F-FPELIM: # %bb.0:
1402 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -64
1403 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp)
1404 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 17
1405 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 24(sp)
1406 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 16
1407 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 20(sp)
1408 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 15
1409 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1410 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262236
1411 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 655
1412 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
1413 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 377487
1414 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 1475
1415 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 8(sp)
1416 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 14
1417 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1418 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262153
1419 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 491
1420 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 44(sp)
1421 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 545260
1422 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -1967
1423 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 40(sp)
1424 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 964690
1425 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -328
1426 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 36(sp)
1427 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 335544
1428 ; ILP32-ILP32F-FPELIM-NEXT: addi a5, a0, 1311
1429 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 688509
1430 ; ILP32-ILP32F-FPELIM-NEXT: addi a6, a0, -2048
1431 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, sp, 32
1432 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 1
1433 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 11
1434 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, zero, 12
1435 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 13
1436 ; ILP32-ILP32F-FPELIM-NEXT: addi a7, zero, 4
1437 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 32(sp)
1438 ; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee
1439 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp)
1440 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 64
1441 ; ILP32-ILP32F-FPELIM-NEXT: ret
1442 ;
1443 ; ILP32-ILP32F-WITHFP-LABEL: va5_aligned_stack_caller:
1444 ; ILP32-ILP32F-WITHFP: # %bb.0:
1445 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1446 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp)
1447 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp)
1448 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 64
1449 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 17
1450 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 24(sp)
1451 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 16
1452 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 20(sp)
1453 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 15
1454 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 16(sp)
1455 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262236
1456 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 655
1457 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 12(sp)
1458 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 377487
1459 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 1475
1460 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 8(sp)
1461 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 14
1462 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(sp)
1463 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262153
1464 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 491
1465 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1466 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 545260
1467 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1967
1468 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -24(s0)
1469 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 964690
1470 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -328
1471 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -28(s0)
1472 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 335544
1473 ; ILP32-ILP32F-WITHFP-NEXT: addi a5, a0, 1311
1474 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 688509
1475 ; ILP32-ILP32F-WITHFP-NEXT: addi a6, a0, -2048
1476 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32
1477 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 1
1478 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 11
1479 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, zero, 12
1480 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 13
1481 ; ILP32-ILP32F-WITHFP-NEXT: addi a7, zero, 4
1482 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0)
1483 ; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee
1484 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp)
1485 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp)
1486 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1487 ; ILP32-ILP32F-WITHFP-NEXT: ret
1488 ;
1489 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller:
1490 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1491 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64
1492 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp)
1493 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236
1494 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 655
1495 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
1496 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 377487
1497 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 1475
1498 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 8(sp)
1499 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 17
1500 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 24(sp)
1501 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 16
1502 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 20(sp)
1503 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 15
1504 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1505 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 14
1506 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1507 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262153
1508 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 491
1509 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 44(sp)
1510 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 545260
1511 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -1967
1512 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 40(sp)
1513 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 964690
1514 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -328
1515 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 36(sp)
1516 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 335544
1517 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a0, 1311
1518 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 688509
1519 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a0, -2048
1520 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, sp, 32
1521 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 1
1522 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 11
1523 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, zero, 12
1524 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 13
1525 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, zero, 4
1526 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 32(sp)
1527 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee
1528 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp)
1529 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 64
1530 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1531 ;
1532 ; LP64-LP64F-LP64D-FPELIM-LABEL: va5_aligned_stack_caller:
1533 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1534 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -48
1535 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp)
1536 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 17
1537 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 24(sp)
1538 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 16
1539 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1540 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 15
1541 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1542 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 2049
1543 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, -1147
1544 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13
1545 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983
1546 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14
1547 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 655
1548 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1549 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi t0, a0, 1475
1550 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1192
1551 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 381
1552 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1553 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a6, a0, -2048
1554 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1048248
1555 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 1311
1556 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1557 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1147
1558 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13
1559 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983
1560 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15
1561 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 1311
1562 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 512
1563 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 73
1564 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15
1565 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1311
1566 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1567 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 1147
1568 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14
1569 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, -1967
1570 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1
1571 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 11
1572 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a4, zero, 12
1573 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a5, zero, 13
1574 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a7, zero, 14
1575 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd t0, 0(sp)
1576 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee
1577 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp)
1578 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 48
1579 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1580 ;
1581 ; LP64-LP64F-LP64D-WITHFP-LABEL: va5_aligned_stack_caller:
1582 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1583 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -48
1584 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp)
1585 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp)
1586 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1587 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 17
1588 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 24(sp)
1589 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 16
1590 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 16(sp)
1591 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 15
1592 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 8(sp)
1593 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 2049
1594 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1147
1595 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13
1596 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983
1597 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14
1598 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 655
1599 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1600 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi t0, a0, 1475
1601 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1192
1602 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 381
1603 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1604 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a6, a0, -2048
1605 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1048248
1606 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 1311
1607 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1608 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1147
1609 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13
1610 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983
1611 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15
1612 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 1311
1613 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 512
1614 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 73
1615 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15
1616 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1311
1617 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1618 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 1147
1619 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14
1620 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, -1967
1621 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1
1622 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 11
1623 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a4, zero, 12
1624 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a5, zero, 13
1625 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a7, zero, 14
1626 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp)
1627 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee
1628 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp)
1629 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp)
1630 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48
1631 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1632 %1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11,
1633 fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000,
1634 i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17])
1635 ret void
1636 }
1638 ; A function with no fixed arguments is not valid C, but can be
1639 ; specified in LLVM IR. We must ensure the vararg save area is
1640 ; still set up correctly.
1642 define i32 @va6_no_fixed_args(...) nounwind {
1643 ; ILP32-ILP32F-FPELIM-LABEL: va6_no_fixed_args:
1644 ; ILP32-ILP32F-FPELIM: # %bb.0:
1645 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1646 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1647 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1648 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1649 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1650 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1651 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1652 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1653 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1654 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 20
1655 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
1656 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1657 ; ILP32-ILP32F-FPELIM-NEXT: ret
1658 ;
1659 ; ILP32-ILP32F-WITHFP-LABEL: va6_no_fixed_args:
1660 ; ILP32-ILP32F-WITHFP: # %bb.0:
1661 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
1662 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp)
1663 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp)
1664 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1665 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1666 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1667 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1668 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1669 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1670 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1671 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1672 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0)
1673 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4
1674 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
1675 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp)
1676 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp)
1677 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1678 ; ILP32-ILP32F-WITHFP-NEXT: ret
1679 ;
1680 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args:
1681 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1682 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1683 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1684 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1685 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1686 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1687 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1688 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1689 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1690 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1691 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 20
1692 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
1693 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1694 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1695 ;
1696 ; LP64-LP64F-LP64D-FPELIM-LABEL: va6_no_fixed_args:
1697 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1698 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
1699 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
1700 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
1701 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
1702 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
1703 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
1704 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
1705 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
1706 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1707 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 16
1708 ; LP64-LP64F-LP64D-FPELIM-NEXT: ori a1, a1, 8
1709 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1710 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
1711 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1712 ;
1713 ; LP64-LP64F-LP64D-WITHFP-LABEL: va6_no_fixed_args:
1714 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1715 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
1716 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp)
1717 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp)
1718 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1719 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1720 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1721 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1722 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1723 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1724 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1725 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1726 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0)
1727 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a1, s0
1728 ; LP64-LP64F-LP64D-WITHFP-NEXT: ori a1, a1, 8
1729 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
1730 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp)
1731 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp)
1732 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
1733 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1734 %va = alloca i8*, align 4
1735 %1 = bitcast i8** %va to i8*
1736 call void @llvm.va_start(i8* %1)
1737 %2 = va_arg i8** %va, i32
1738 call void @llvm.va_end(i8* %1)
1739 ret i32 %2
1740 }