1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt %s -instcombine -S | FileCheck %s
4 ; For pattern ((X << Y) & ~C) ==/!= 0; when C+1 is power of 2
5 ; it may be optimal to fold into (X << Y) </>= C+1
6 ; rather than X & (~C l>> Y) ==/!= 0
10 define i1 @scalar_i8_shl_and_negC_eq(i8 %x, i8 %y) {
11 ; CHECK-LABEL: @scalar_i8_shl_and_negC_eq(
12 ; CHECK-NEXT: [[SHL:%.*]] = shl i8 [[X:%.*]], [[Y:%.*]]
13 ; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[SHL]], 4
14 ; CHECK-NEXT: ret i1 [[R]]
17 %and = and i8 %shl, 252 ; ~3
18 %r = icmp eq i8 %and, 0
22 define i1 @scalar_i16_shl_and_negC_eq(i16 %x, i16 %y) {
23 ; CHECK-LABEL: @scalar_i16_shl_and_negC_eq(
24 ; CHECK-NEXT: [[SHL:%.*]] = shl i16 [[X:%.*]], [[Y:%.*]]
25 ; CHECK-NEXT: [[R:%.*]] = icmp ult i16 [[SHL]], 128
26 ; CHECK-NEXT: ret i1 [[R]]
29 %and = and i16 %shl, 65408 ; ~127
30 %r = icmp eq i16 %and, 0
34 define i1 @scalar_i32_shl_and_negC_eq(i32 %x, i32 %y) {
35 ; CHECK-LABEL: @scalar_i32_shl_and_negC_eq(
36 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
37 ; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[SHL]], 262144
38 ; CHECK-NEXT: ret i1 [[R]]
41 %and = and i32 %shl, 4294705152 ; ~262143
42 %r = icmp eq i32 %and, 0
46 define i1 @scalar_i64_shl_and_negC_eq(i64 %x, i64 %y) {
47 ; CHECK-LABEL: @scalar_i64_shl_and_negC_eq(
48 ; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[X:%.*]], [[Y:%.*]]
49 ; CHECK-NEXT: [[R:%.*]] = icmp ult i64 [[SHL]], 8589934592
50 ; CHECK-NEXT: ret i1 [[R]]
53 %and = and i64 %shl, 18446744065119617024 ; ~8589934591
54 %r = icmp eq i64 %and, 0
58 define i1 @scalar_i32_shl_and_negC_ne(i32 %x, i32 %y) {
59 ; CHECK-LABEL: @scalar_i32_shl_and_negC_ne(
60 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
61 ; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[SHL]], 262143
62 ; CHECK-NEXT: ret i1 [[R]]
65 %and = and i32 %shl, 4294705152 ; ~262143
66 %r = icmp ne i32 %and, 0 ; check 'ne' predicate
72 define <4 x i1> @vec_4xi32_shl_and_negC_eq(<4 x i32> %x, <4 x i32> %y) {
73 ; CHECK-LABEL: @vec_4xi32_shl_and_negC_eq(
74 ; CHECK-NEXT: [[SHL:%.*]] = shl <4 x i32> [[X:%.*]], [[Y:%.*]]
75 ; CHECK-NEXT: [[R:%.*]] = icmp ult <4 x i32> [[SHL]], <i32 8, i32 8, i32 8, i32 8>
76 ; CHECK-NEXT: ret <4 x i1> [[R]]
78 %shl = shl <4 x i32> %x, %y
79 %and = and <4 x i32> %shl, <i32 4294967288, i32 4294967288, i32 4294967288, i32 4294967288> ; ~7
80 %r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 0>
84 define <4 x i1> @vec_shl_and_negC_eq_undef1(<4 x i32> %x, <4 x i32> %y) {
85 ; CHECK-LABEL: @vec_shl_and_negC_eq_undef1(
86 ; CHECK-NEXT: [[SHL:%.*]] = shl <4 x i32> [[X:%.*]], [[Y:%.*]]
87 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[SHL]], <i32 -8, i32 undef, i32 -8, i32 -8>
88 ; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], zeroinitializer
89 ; CHECK-NEXT: ret <4 x i1> [[R]]
91 %shl = shl <4 x i32> %x, %y
92 %and = and <4 x i32> %shl, <i32 4294967288, i32 undef, i32 4294967288, i32 4294967288> ; ~7
93 %r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 0>
97 define <4 x i1> @vec_shl_and_negC_eq_undef2(<4 x i32> %x, <4 x i32> %y) {
98 ; CHECK-LABEL: @vec_shl_and_negC_eq_undef2(
99 ; CHECK-NEXT: [[SHL:%.*]] = shl <4 x i32> [[X:%.*]], [[Y:%.*]]
100 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[SHL]], <i32 -8, i32 -8, i32 -8, i32 -8>
101 ; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], <i32 0, i32 0, i32 0, i32 undef>
102 ; CHECK-NEXT: ret <4 x i1> [[R]]
104 %shl = shl <4 x i32> %x, %y
105 %and = and <4 x i32> %shl, <i32 4294967288, i32 4294967288, i32 4294967288, i32 4294967288> ; ~7
106 %r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 undef>
110 define <4 x i1> @vec_shl_and_negC_eq_undef3(<4 x i32> %x, <4 x i32> %y) {
111 ; CHECK-LABEL: @vec_shl_and_negC_eq_undef3(
112 ; CHECK-NEXT: [[SHL:%.*]] = shl <4 x i32> [[X:%.*]], [[Y:%.*]]
113 ; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[SHL]], <i32 -8, i32 -8, i32 undef, i32 -8>
114 ; CHECK-NEXT: [[R:%.*]] = icmp eq <4 x i32> [[AND]], <i32 0, i32 0, i32 0, i32 undef>
115 ; CHECK-NEXT: ret <4 x i1> [[R]]
117 %shl = shl <4 x i32> %x, %y
118 %and = and <4 x i32> %shl, <i32 4294967288, i32 4294967288, i32 undef, i32 4294967288> ; ~7
119 %r = icmp eq <4 x i32> %and, <i32 0, i32 0, i32 0, i32 undef>
126 define i1 @scalar_shl_and_negC_eq_extra_use_shl(i32 %x, i32 %y, i32 %z, i32* %p) {
127 ; CHECK-LABEL: @scalar_shl_and_negC_eq_extra_use_shl(
128 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
129 ; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[SHL]], [[Z:%.*]]
130 ; CHECK-NEXT: store i32 [[XOR]], i32* [[P:%.*]], align 4
131 ; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[SHL]], 8
132 ; CHECK-NEXT: ret i1 [[R]]
134 %shl = shl i32 %x, %y
135 %xor = xor i32 %shl, %z ; extra use of shl
136 store i32 %xor, i32* %p
137 %and = and i32 %shl, 4294967288 ; ~7
138 %r = icmp eq i32 %and, 0
143 define i1 @scalar_shl_and_negC_eq_extra_use_and(i32 %x, i32 %y, i32 %z, i32* %p) {
144 ; CHECK-LABEL: @scalar_shl_and_negC_eq_extra_use_and(
145 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
146 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], -8
147 ; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[AND]], [[Z:%.*]]
148 ; CHECK-NEXT: store i32 [[MUL]], i32* [[P:%.*]], align 4
149 ; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
150 ; CHECK-NEXT: ret i1 [[R]]
152 %shl = shl i32 %x, %y
153 %and = and i32 %shl, 4294967288 ; ~7
154 %mul = mul i32 %and, %z ; extra use of and
155 store i32 %mul, i32* %p
156 %r = icmp eq i32 %and, 0
161 define i1 @scalar_shl_and_negC_eq_extra_use_shl_and(i32 %x, i32 %y, i32 %z, i32* %p, i32* %q) {
162 ; CHECK-LABEL: @scalar_shl_and_negC_eq_extra_use_shl_and(
163 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
164 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL]], -8
165 ; CHECK-NEXT: store i32 [[AND]], i32* [[P:%.*]], align 4
166 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SHL]], [[Z:%.*]]
167 ; CHECK-NEXT: store i32 [[ADD]], i32* [[Q:%.*]], align 4
168 ; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[AND]], 0
169 ; CHECK-NEXT: ret i1 [[R]]
171 %shl = shl i32 %x, %y
172 %and = and i32 %shl, 4294967288 ; ~7
173 store i32 %and, i32* %p ; extra use of and
174 %add = add i32 %shl, %z ; extra use of shl
175 store i32 %add, i32* %q
176 %r = icmp eq i32 %and, 0
184 define i1 @scalar_i32_shl_and_negC_eq_X_is_constant1(i32 %y) {
185 ; CHECK-LABEL: @scalar_i32_shl_and_negC_eq_X_is_constant1(
186 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 12345, [[Y:%.*]]
187 ; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[SHL]], 8
188 ; CHECK-NEXT: ret i1 [[R]]
190 %shl = shl i32 12345, %y
191 %and = and i32 %shl, 4294967288 ; ~7
192 %r = icmp eq i32 %and, 0
196 define i1 @scalar_i32_shl_and_negC_eq_X_is_constant2(i32 %y) {
197 ; CHECK-LABEL: @scalar_i32_shl_and_negC_eq_X_is_constant2(
198 ; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[Y:%.*]], 3
199 ; CHECK-NEXT: ret i1 [[R]]
202 %and = and i32 %shl, 4294967288 ; ~7
203 %r = icmp eq i32 %and, 0
207 ; Check 'slt' predicate
209 define i1 @scalar_i32_shl_and_negC_slt(i32 %x, i32 %y) {
210 ; CHECK-LABEL: @scalar_i32_shl_and_negC_slt(
211 ; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
212 ; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[SHL]], 0
213 ; CHECK-NEXT: ret i1 [[R]]
215 %shl = shl i32 %x, %y
216 %and = and i32 %shl, 4294967288 ; ~7
217 %r = icmp slt i32 %and, 0
221 ; Compare with nonzero
223 define i1 @scalar_i32_shl_and_negC_eq_nonzero(i32 %x, i32 %y) {
224 ; CHECK-LABEL: @scalar_i32_shl_and_negC_eq_nonzero(
225 ; CHECK-NEXT: ret i1 false
227 %shl = shl i32 %x, %y
228 %and = and i32 %shl, 4294967288 ; ~7
229 %r = icmp eq i32 %and, 1 ; should be comparing with 0