1 ; RUN: llc -relocation-model=static -verify-machineinstrs -O0 < %s -mcpu=ppc64 | FileCheck -check-prefix=OPT0 %s
2 ; RUN: llc -relocation-model=static -verify-machineinstrs -O1 < %s -mcpu=ppc64 | FileCheck -check-prefix=OPT1 %s
3 ; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=ppc32-- -mcpu=ppc | FileCheck -check-prefix=OPT0-PPC32 %s
5 target triple = "powerpc64-unknown-linux-gnu"
7 @a = thread_local global i32 0, align 4
9 ;OPT0-LABEL: localexec:
10 ;OPT1-LABEL: localexec:
11 define i32 @localexec() nounwind {
13 ;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha
14 ;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l
15 ;OPT0-NEXT: li [[REG2:[0-9]+]], 42
16 ;OPT0: stw [[REG2]], 0([[REG1]])
17 ;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha
18 ;OPT1-NEXT: li [[REG2:[0-9]+]], 42
19 ;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]])
20 store i32 42, i32* @a, align 4
24 ; Test correct assembly code generation for thread-local storage
25 ; using the initial-exec model.
27 @a2 = external thread_local global i32
29 define signext i32 @main2() nounwind {
31 %retval = alloca i32, align 4
32 store i32 0, i32* %retval
33 %0 = load i32, i32* @a2, align 4
38 ; OPT1: addis [[REG1:[0-9]+]], 2, a2@got@tprel@ha
39 ; OPT1: ld [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
40 ; OPT1: add {{[0-9]+}}, [[REG2]], a2@tls
42 ;OPT0-PPC32-LABEL: main2:
43 ;OPT0-PPC32: li [[REG1:[0-9]+]], _GLOBAL_OFFSET_TABLE_@l
44 ;OPT0-PPC32: addis [[REG1]], [[REG1]], _GLOBAL_OFFSET_TABLE_@ha
45 ;OPT0-PPC32: lwz [[REG2:[0-9]+]], a2@got@tprel@l([[REG1]])
46 ;OPT0-PPC32: add 3, [[REG2]], a2@tls