lib/Target/PowerPC/PPCTargetTransformInfo.h

   1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file a TargetTransformInfo::Concept conforming object specific to the
  10 /// PPC target machine. It uses the target's detailed information to
  11 /// provide more precise answers to certain TTI queries, while letting the
  12 /// target independent and default TTI implementations handle the rest.
  13 ///
  14 //===----------------------------------------------------------------------===//
  15
  16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
  17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
  18
  19 #include "PPCTargetMachine.h"
  20 #include "llvm/Analysis/TargetTransformInfo.h"
  21 #include "llvm/CodeGen/BasicTTIImpl.h"
  22 #include "llvm/CodeGen/TargetLowering.h"
  23
  24 namespace llvm {
  25
  26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
  27   typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
  28   typedef TargetTransformInfo TTI;
  29   friend BaseT;
  30
  31   const PPCSubtarget *ST;
  32   const PPCTargetLowering *TLI;
  33
  34   const PPCSubtarget *getST() const { return ST; }
  35   const PPCTargetLowering *getTLI() const { return TLI; }
  36   bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo);
  37
  38 public:
  39   explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
  40       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
  41         TLI(ST->getTargetLowering()) {}
  42
  43   /// \name Scalar TTI Implementations
  44   /// @{
  45
  46   using BaseT::getIntImmCost;
  47   int getIntImmCost(const APInt &Imm, Type *Ty);
  48
  49   int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
  50   int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
  51                     Type *Ty);
  52
  53   unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands);
  54
  55   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
  56   bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
  57                                 AssumptionCache &AC,
  58                                 TargetLibraryInfo *LibInfo,
  59                                 HardwareLoopInfo &HWLoopInfo);
  60   bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
  61                   DominatorTree *DT, AssumptionCache *AC,
  62                   TargetLibraryInfo *LibInfo);
  63   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
  64                                TTI::UnrollingPreferences &UP);
  65
  66   /// @}
  67
  68   /// \name Vector TTI Implementations
  69   /// @{
  70   bool useColdCCForColdCall(Function &F);
  71   bool enableAggressiveInterleaving(bool LoopHasReductions);
  72   TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
  73                                                     bool IsZeroCmp) const;
  74   bool enableInterleavedAccessVectorization();
  75
  76   enum PPCRegisterClass {
  77     GPRRC, FPRRC, VRRC, VSXRC
  78   };
  79   unsigned getNumberOfRegisters(unsigned ClassID) const;
  80   unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
  81   const char* getRegisterClassName(unsigned ClassID) const;
  82   unsigned getRegisterBitWidth(bool Vector) const;
  83   unsigned getCacheLineSize() const override;
  84   unsigned getPrefetchDistance() const override;
  85   unsigned getMaxInterleaveFactor(unsigned VF);
  86   int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2);
  87   int getArithmeticInstrCost(
  88       unsigned Opcode, Type *Ty,
  89       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
  90       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
  91       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
  92       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
  93       ArrayRef<const Value *> Args = ArrayRef<const Value *>());
  94   int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
  95   int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
  96                        const Instruction *I = nullptr);
  97   int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
  98                          const Instruction *I = nullptr);
  99   int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
 100   int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
 101                       unsigned AddressSpace, const Instruction *I = nullptr);
 102   int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
 103                                  unsigned Factor,
 104                                  ArrayRef<unsigned> Indices,
 105                                  unsigned Alignment,
 106                                  unsigned AddressSpace,
 107                                  bool UseMaskForCond = false,
 108                                  bool UseMaskForGaps = false);
 109
 110   /// @}
 111 };
 112
 113 } // end namespace llvm
 114
 115 #endif