[ARM] Rejig MVE load store tests. NFC
[llvm-core.git] / lib / Transforms / Utils / Mem2Reg.cpp
blobcd2c81b6abc84bb6402543a46523947830226c67
1 //===- Mem2Reg.cpp - The -mem2reg pass, a wrapper around the Utils lib ----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass is a simple pass wrapper around the PromoteMemToReg function call
10 // exposed by the Utils library.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Transforms/Utils/Mem2Reg.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/Analysis/AssumptionCache.h"
17 #include "llvm/IR/BasicBlock.h"
18 #include "llvm/IR/Dominators.h"
19 #include "llvm/IR/Function.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/PassManager.h"
22 #include "llvm/Pass.h"
23 #include "llvm/Support/Casting.h"
24 #include "llvm/Transforms/Utils.h"
25 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
26 #include <vector>
28 using namespace llvm;
30 #define DEBUG_TYPE "mem2reg"
32 STATISTIC(NumPromoted, "Number of alloca's promoted");
34 static bool promoteMemoryToRegister(Function &F, DominatorTree &DT,
35 AssumptionCache &AC) {
36 std::vector<AllocaInst *> Allocas;
37 BasicBlock &BB = F.getEntryBlock(); // Get the entry node for the function
38 bool Changed = false;
40 while (true) {
41 Allocas.clear();
43 // Find allocas that are safe to promote, by looking at all instructions in
44 // the entry node
45 for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I)
46 if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) // Is it an alloca?
47 if (isAllocaPromotable(AI))
48 Allocas.push_back(AI);
50 if (Allocas.empty())
51 break;
53 PromoteMemToReg(Allocas, DT, &AC);
54 NumPromoted += Allocas.size();
55 Changed = true;
57 return Changed;
60 PreservedAnalyses PromotePass::run(Function &F, FunctionAnalysisManager &AM) {
61 auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
62 auto &AC = AM.getResult<AssumptionAnalysis>(F);
63 if (!promoteMemoryToRegister(F, DT, AC))
64 return PreservedAnalyses::all();
66 PreservedAnalyses PA;
67 PA.preserveSet<CFGAnalyses>();
68 return PA;
71 namespace {
73 struct PromoteLegacyPass : public FunctionPass {
74 // Pass identification, replacement for typeid
75 static char ID;
77 PromoteLegacyPass() : FunctionPass(ID) {
78 initializePromoteLegacyPassPass(*PassRegistry::getPassRegistry());
81 // runOnFunction - To run this pass, first we calculate the alloca
82 // instructions that are safe for promotion, then we promote each one.
83 bool runOnFunction(Function &F) override {
84 if (skipFunction(F))
85 return false;
87 DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
88 AssumptionCache &AC =
89 getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
90 return promoteMemoryToRegister(F, DT, AC);
93 void getAnalysisUsage(AnalysisUsage &AU) const override {
94 AU.addRequired<AssumptionCacheTracker>();
95 AU.addRequired<DominatorTreeWrapperPass>();
96 AU.setPreservesCFG();
100 } // end anonymous namespace
102 char PromoteLegacyPass::ID = 0;
104 INITIALIZE_PASS_BEGIN(PromoteLegacyPass, "mem2reg", "Promote Memory to "
105 "Register",
106 false, false)
107 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
108 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
109 INITIALIZE_PASS_END(PromoteLegacyPass, "mem2reg", "Promote Memory to Register",
110 false, false)
112 // createPromoteMemoryToRegister - Provide an entry point to create this pass.
113 FunctionPass *llvm::createPromoteMemoryToRegisterPass() {
114 return new PromoteLegacyPass();