[x86] fix assert with horizontal math + broadcast of vector (PR43402)
[llvm-core.git] / lib / CodeGen / SelectionDAG / SelectionDAGDumper.cpp
blob003dbb233b328c348aae2246eb87b4b9b6fd5ab4
1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
11 //===----------------------------------------------------------------------===//
13 #include "llvm/ADT/APFloat.h"
14 #include "llvm/ADT/APInt.h"
15 #include "llvm/ADT/None.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "SDNodeDbgValue.h"
49 #include <cstdint>
50 #include <iterator>
52 using namespace llvm;
54 static cl::opt<bool>
55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
56 cl::desc("Display more information when dumping selection "
57 "DAG nodes."));
59 std::string SDNode::getOperationName(const SelectionDAG *G) const {
60 switch (getOpcode()) {
61 default:
62 if (getOpcode() < ISD::BUILTIN_OP_END)
63 return "<<Unknown DAG Node>>";
64 if (isMachineOpcode()) {
65 if (G)
66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
67 if (getMachineOpcode() < TII->getNumOpcodes())
68 return TII->getName(getMachineOpcode());
69 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
71 if (G) {
72 const TargetLowering &TLI = G->getTargetLoweringInfo();
73 const char *Name = TLI.getTargetNodeName(getOpcode());
74 if (Name) return Name;
75 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
77 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
79 #ifndef NDEBUG
80 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
81 #endif
82 case ISD::PREFETCH: return "Prefetch";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
99 case ISD::ATOMIC_LOAD: return "AtomicLoad";
100 case ISD::ATOMIC_STORE: return "AtomicStore";
101 case ISD::PCMARKER: return "PCMarker";
102 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
103 case ISD::SRCVALUE: return "SrcValue";
104 case ISD::MDNODE_SDNODE: return "MDNode";
105 case ISD::EntryToken: return "EntryToken";
106 case ISD::TokenFactor: return "TokenFactor";
107 case ISD::AssertSext: return "AssertSext";
108 case ISD::AssertZext: return "AssertZext";
110 case ISD::BasicBlock: return "BasicBlock";
111 case ISD::VALUETYPE: return "ValueType";
112 case ISD::Register: return "Register";
113 case ISD::RegisterMask: return "RegisterMask";
114 case ISD::Constant:
115 if (cast<ConstantSDNode>(this)->isOpaque())
116 return "OpaqueConstant";
117 return "Constant";
118 case ISD::ConstantFP: return "ConstantFP";
119 case ISD::GlobalAddress: return "GlobalAddress";
120 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
121 case ISD::FrameIndex: return "FrameIndex";
122 case ISD::JumpTable: return "JumpTable";
123 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
124 case ISD::RETURNADDR: return "RETURNADDR";
125 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
126 case ISD::FRAMEADDR: return "FRAMEADDR";
127 case ISD::SPONENTRY: return "SPONENTRY";
128 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
129 case ISD::READ_REGISTER: return "READ_REGISTER";
130 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
131 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
132 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
133 case ISD::EH_RETURN: return "EH_RETURN";
134 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
135 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
136 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
137 case ISD::ConstantPool: return "ConstantPool";
138 case ISD::TargetIndex: return "TargetIndex";
139 case ISD::ExternalSymbol: return "ExternalSymbol";
140 case ISD::BlockAddress: return "BlockAddress";
141 case ISD::INTRINSIC_WO_CHAIN:
142 case ISD::INTRINSIC_VOID:
143 case ISD::INTRINSIC_W_CHAIN: {
144 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
145 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
146 if (IID < Intrinsic::num_intrinsics)
147 return Intrinsic::getName((Intrinsic::ID)IID, None);
148 else if (!G)
149 return "Unknown intrinsic";
150 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
151 return TII->getName(IID);
152 llvm_unreachable("Invalid intrinsic ID");
155 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
156 case ISD::TargetConstant:
157 if (cast<ConstantSDNode>(this)->isOpaque())
158 return "OpaqueTargetConstant";
159 return "TargetConstant";
160 case ISD::TargetConstantFP: return "TargetConstantFP";
161 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
162 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
163 case ISD::TargetFrameIndex: return "TargetFrameIndex";
164 case ISD::TargetJumpTable: return "TargetJumpTable";
165 case ISD::TargetConstantPool: return "TargetConstantPool";
166 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
167 case ISD::MCSymbol: return "MCSymbol";
168 case ISD::TargetBlockAddress: return "TargetBlockAddress";
170 case ISD::CopyToReg: return "CopyToReg";
171 case ISD::CopyFromReg: return "CopyFromReg";
172 case ISD::UNDEF: return "undef";
173 case ISD::MERGE_VALUES: return "merge_values";
174 case ISD::INLINEASM: return "inlineasm";
175 case ISD::INLINEASM_BR: return "inlineasm_br";
176 case ISD::EH_LABEL: return "eh_label";
177 case ISD::ANNOTATION_LABEL: return "annotation_label";
178 case ISD::HANDLENODE: return "handlenode";
180 // Unary operators
181 case ISD::FABS: return "fabs";
182 case ISD::FMINNUM: return "fminnum";
183 case ISD::STRICT_FMINNUM: return "strict_fminnum";
184 case ISD::FMAXNUM: return "fmaxnum";
185 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
186 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
187 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
188 case ISD::FMINIMUM: return "fminimum";
189 case ISD::FMAXIMUM: return "fmaximum";
190 case ISD::FNEG: return "fneg";
191 case ISD::FSQRT: return "fsqrt";
192 case ISD::STRICT_FSQRT: return "strict_fsqrt";
193 case ISD::FCBRT: return "fcbrt";
194 case ISD::FSIN: return "fsin";
195 case ISD::STRICT_FSIN: return "strict_fsin";
196 case ISD::FCOS: return "fcos";
197 case ISD::STRICT_FCOS: return "strict_fcos";
198 case ISD::FSINCOS: return "fsincos";
199 case ISD::FTRUNC: return "ftrunc";
200 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
201 case ISD::FFLOOR: return "ffloor";
202 case ISD::STRICT_FFLOOR: return "strict_ffloor";
203 case ISD::FCEIL: return "fceil";
204 case ISD::STRICT_FCEIL: return "strict_fceil";
205 case ISD::FRINT: return "frint";
206 case ISD::STRICT_FRINT: return "strict_frint";
207 case ISD::FNEARBYINT: return "fnearbyint";
208 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
209 case ISD::FROUND: return "fround";
210 case ISD::STRICT_FROUND: return "strict_fround";
211 case ISD::FEXP: return "fexp";
212 case ISD::STRICT_FEXP: return "strict_fexp";
213 case ISD::FEXP2: return "fexp2";
214 case ISD::STRICT_FEXP2: return "strict_fexp2";
215 case ISD::FLOG: return "flog";
216 case ISD::STRICT_FLOG: return "strict_flog";
217 case ISD::FLOG2: return "flog2";
218 case ISD::STRICT_FLOG2: return "strict_flog2";
219 case ISD::FLOG10: return "flog10";
220 case ISD::STRICT_FLOG10: return "strict_flog10";
222 // Binary operators
223 case ISD::ADD: return "add";
224 case ISD::SUB: return "sub";
225 case ISD::MUL: return "mul";
226 case ISD::MULHU: return "mulhu";
227 case ISD::MULHS: return "mulhs";
228 case ISD::SDIV: return "sdiv";
229 case ISD::UDIV: return "udiv";
230 case ISD::SREM: return "srem";
231 case ISD::UREM: return "urem";
232 case ISD::SMUL_LOHI: return "smul_lohi";
233 case ISD::UMUL_LOHI: return "umul_lohi";
234 case ISD::SDIVREM: return "sdivrem";
235 case ISD::UDIVREM: return "udivrem";
236 case ISD::AND: return "and";
237 case ISD::OR: return "or";
238 case ISD::XOR: return "xor";
239 case ISD::SHL: return "shl";
240 case ISD::SRA: return "sra";
241 case ISD::SRL: return "srl";
242 case ISD::ROTL: return "rotl";
243 case ISD::ROTR: return "rotr";
244 case ISD::FSHL: return "fshl";
245 case ISD::FSHR: return "fshr";
246 case ISD::FADD: return "fadd";
247 case ISD::STRICT_FADD: return "strict_fadd";
248 case ISD::FSUB: return "fsub";
249 case ISD::STRICT_FSUB: return "strict_fsub";
250 case ISD::FMUL: return "fmul";
251 case ISD::STRICT_FMUL: return "strict_fmul";
252 case ISD::FDIV: return "fdiv";
253 case ISD::STRICT_FDIV: return "strict_fdiv";
254 case ISD::FMA: return "fma";
255 case ISD::STRICT_FMA: return "strict_fma";
256 case ISD::FMAD: return "fmad";
257 case ISD::FREM: return "frem";
258 case ISD::STRICT_FREM: return "strict_frem";
259 case ISD::FCOPYSIGN: return "fcopysign";
260 case ISD::FGETSIGN: return "fgetsign";
261 case ISD::FCANONICALIZE: return "fcanonicalize";
262 case ISD::FPOW: return "fpow";
263 case ISD::STRICT_FPOW: return "strict_fpow";
264 case ISD::SMIN: return "smin";
265 case ISD::SMAX: return "smax";
266 case ISD::UMIN: return "umin";
267 case ISD::UMAX: return "umax";
269 case ISD::FPOWI: return "fpowi";
270 case ISD::STRICT_FPOWI: return "strict_fpowi";
271 case ISD::SETCC: return "setcc";
272 case ISD::SETCCCARRY: return "setcccarry";
273 case ISD::SELECT: return "select";
274 case ISD::VSELECT: return "vselect";
275 case ISD::SELECT_CC: return "select_cc";
276 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
277 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
278 case ISD::CONCAT_VECTORS: return "concat_vectors";
279 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
280 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
281 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
282 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
283 case ISD::CARRY_FALSE: return "carry_false";
284 case ISD::ADDC: return "addc";
285 case ISD::ADDE: return "adde";
286 case ISD::ADDCARRY: return "addcarry";
287 case ISD::SADDO: return "saddo";
288 case ISD::UADDO: return "uaddo";
289 case ISD::SSUBO: return "ssubo";
290 case ISD::USUBO: return "usubo";
291 case ISD::SMULO: return "smulo";
292 case ISD::UMULO: return "umulo";
293 case ISD::SUBC: return "subc";
294 case ISD::SUBE: return "sube";
295 case ISD::SUBCARRY: return "subcarry";
296 case ISD::SHL_PARTS: return "shl_parts";
297 case ISD::SRA_PARTS: return "sra_parts";
298 case ISD::SRL_PARTS: return "srl_parts";
300 case ISD::SADDSAT: return "saddsat";
301 case ISD::UADDSAT: return "uaddsat";
302 case ISD::SSUBSAT: return "ssubsat";
303 case ISD::USUBSAT: return "usubsat";
305 case ISD::SMULFIX: return "smulfix";
306 case ISD::SMULFIXSAT: return "smulfixsat";
307 case ISD::UMULFIX: return "umulfix";
308 case ISD::UMULFIXSAT: return "umulfixsat";
310 // Conversion operators.
311 case ISD::SIGN_EXTEND: return "sign_extend";
312 case ISD::ZERO_EXTEND: return "zero_extend";
313 case ISD::ANY_EXTEND: return "any_extend";
314 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
315 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
316 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
317 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
318 case ISD::TRUNCATE: return "truncate";
319 case ISD::FP_ROUND: return "fp_round";
320 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
321 case ISD::FLT_ROUNDS_: return "flt_rounds";
322 case ISD::FP_EXTEND: return "fp_extend";
323 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
325 case ISD::SINT_TO_FP: return "sint_to_fp";
326 case ISD::UINT_TO_FP: return "uint_to_fp";
327 case ISD::FP_TO_SINT: return "fp_to_sint";
328 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
329 case ISD::FP_TO_UINT: return "fp_to_uint";
330 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
331 case ISD::BITCAST: return "bitcast";
332 case ISD::ADDRSPACECAST: return "addrspacecast";
333 case ISD::FP16_TO_FP: return "fp16_to_fp";
334 case ISD::FP_TO_FP16: return "fp_to_fp16";
335 case ISD::LROUND: return "lround";
336 case ISD::LLROUND: return "llround";
337 case ISD::LRINT: return "lrint";
338 case ISD::LLRINT: return "llrint";
340 // Control flow instructions
341 case ISD::BR: return "br";
342 case ISD::BRIND: return "brind";
343 case ISD::BR_JT: return "br_jt";
344 case ISD::BRCOND: return "brcond";
345 case ISD::BR_CC: return "br_cc";
346 case ISD::CALLSEQ_START: return "callseq_start";
347 case ISD::CALLSEQ_END: return "callseq_end";
349 // EH instructions
350 case ISD::CATCHRET: return "catchret";
351 case ISD::CLEANUPRET: return "cleanupret";
353 // Other operators
354 case ISD::LOAD: return "load";
355 case ISD::STORE: return "store";
356 case ISD::MLOAD: return "masked_load";
357 case ISD::MSTORE: return "masked_store";
358 case ISD::MGATHER: return "masked_gather";
359 case ISD::MSCATTER: return "masked_scatter";
360 case ISD::VAARG: return "vaarg";
361 case ISD::VACOPY: return "vacopy";
362 case ISD::VAEND: return "vaend";
363 case ISD::VASTART: return "vastart";
364 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
365 case ISD::EXTRACT_ELEMENT: return "extract_element";
366 case ISD::BUILD_PAIR: return "build_pair";
367 case ISD::STACKSAVE: return "stacksave";
368 case ISD::STACKRESTORE: return "stackrestore";
369 case ISD::TRAP: return "trap";
370 case ISD::DEBUGTRAP: return "debugtrap";
371 case ISD::LIFETIME_START: return "lifetime.start";
372 case ISD::LIFETIME_END: return "lifetime.end";
373 case ISD::GC_TRANSITION_START: return "gc_transition.start";
374 case ISD::GC_TRANSITION_END: return "gc_transition.end";
375 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
377 // Bit manipulation
378 case ISD::ABS: return "abs";
379 case ISD::BITREVERSE: return "bitreverse";
380 case ISD::BSWAP: return "bswap";
381 case ISD::CTPOP: return "ctpop";
382 case ISD::CTTZ: return "cttz";
383 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
384 case ISD::CTLZ: return "ctlz";
385 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
387 // Trampolines
388 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
389 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
391 case ISD::CONDCODE:
392 switch (cast<CondCodeSDNode>(this)->get()) {
393 default: llvm_unreachable("Unknown setcc condition!");
394 case ISD::SETOEQ: return "setoeq";
395 case ISD::SETOGT: return "setogt";
396 case ISD::SETOGE: return "setoge";
397 case ISD::SETOLT: return "setolt";
398 case ISD::SETOLE: return "setole";
399 case ISD::SETONE: return "setone";
401 case ISD::SETO: return "seto";
402 case ISD::SETUO: return "setuo";
403 case ISD::SETUEQ: return "setueq";
404 case ISD::SETUGT: return "setugt";
405 case ISD::SETUGE: return "setuge";
406 case ISD::SETULT: return "setult";
407 case ISD::SETULE: return "setule";
408 case ISD::SETUNE: return "setune";
410 case ISD::SETEQ: return "seteq";
411 case ISD::SETGT: return "setgt";
412 case ISD::SETGE: return "setge";
413 case ISD::SETLT: return "setlt";
414 case ISD::SETLE: return "setle";
415 case ISD::SETNE: return "setne";
417 case ISD::SETTRUE: return "settrue";
418 case ISD::SETTRUE2: return "settrue2";
419 case ISD::SETFALSE: return "setfalse";
420 case ISD::SETFALSE2: return "setfalse2";
422 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
423 case ISD::VECREDUCE_STRICT_FADD: return "vecreduce_strict_fadd";
424 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
425 case ISD::VECREDUCE_STRICT_FMUL: return "vecreduce_strict_fmul";
426 case ISD::VECREDUCE_ADD: return "vecreduce_add";
427 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
428 case ISD::VECREDUCE_AND: return "vecreduce_and";
429 case ISD::VECREDUCE_OR: return "vecreduce_or";
430 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
431 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
432 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
433 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
434 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
435 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
436 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
440 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
441 switch (AM) {
442 default: return "";
443 case ISD::PRE_INC: return "<pre-inc>";
444 case ISD::PRE_DEC: return "<pre-dec>";
445 case ISD::POST_INC: return "<post-inc>";
446 case ISD::POST_DEC: return "<post-dec>";
450 static Printable PrintNodeId(const SDNode &Node) {
451 return Printable([&Node](raw_ostream &OS) {
452 #ifndef NDEBUG
453 OS << 't' << Node.PersistentId;
454 #else
455 OS << (const void*)&Node;
456 #endif
460 // Print the MMO with more information from the SelectionDAG.
461 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
462 const MachineFunction *MF, const Module *M,
463 const MachineFrameInfo *MFI,
464 const TargetInstrInfo *TII, LLVMContext &Ctx) {
465 ModuleSlotTracker MST(M);
466 if (MF)
467 MST.incorporateFunction(MF->getFunction());
468 SmallVector<StringRef, 0> SSNs;
469 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
472 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
473 const SelectionDAG *G) {
474 if (G) {
475 const MachineFunction *MF = &G->getMachineFunction();
476 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
477 &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(),
478 *G->getContext());
479 } else {
480 LLVMContext Ctx;
481 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
482 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
486 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
487 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
489 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
490 print(dbgs(), G);
491 dbgs() << '\n';
493 #endif
495 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
496 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
497 if (i) OS << ",";
498 if (getValueType(i) == MVT::Other)
499 OS << "ch";
500 else
501 OS << getValueType(i).getEVTString();
505 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
506 if (getFlags().hasNoUnsignedWrap())
507 OS << " nuw";
509 if (getFlags().hasNoSignedWrap())
510 OS << " nsw";
512 if (getFlags().hasExact())
513 OS << " exact";
515 if (getFlags().hasNoNaNs())
516 OS << " nnan";
518 if (getFlags().hasNoInfs())
519 OS << " ninf";
521 if (getFlags().hasNoSignedZeros())
522 OS << " nsz";
524 if (getFlags().hasAllowReciprocal())
525 OS << " arcp";
527 if (getFlags().hasAllowContract())
528 OS << " contract";
530 if (getFlags().hasApproximateFuncs())
531 OS << " afn";
533 if (getFlags().hasAllowReassociation())
534 OS << " reassoc";
536 if (getFlags().hasVectorReduction())
537 OS << " vector-reduction";
539 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
540 if (!MN->memoperands_empty()) {
541 OS << "<";
542 OS << "Mem:";
543 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
544 e = MN->memoperands_end(); i != e; ++i) {
545 printMemOperand(OS, **i, G);
546 if (std::next(i) != e)
547 OS << " ";
549 OS << ">";
551 } else if (const ShuffleVectorSDNode *SVN =
552 dyn_cast<ShuffleVectorSDNode>(this)) {
553 OS << "<";
554 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
555 int Idx = SVN->getMaskElt(i);
556 if (i) OS << ",";
557 if (Idx < 0)
558 OS << "u";
559 else
560 OS << Idx;
562 OS << ">";
563 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
564 OS << '<' << CSDN->getAPIntValue() << '>';
565 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
566 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
567 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
568 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
569 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
570 else {
571 OS << "<APFloat(";
572 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
573 OS << ")>";
575 } else if (const GlobalAddressSDNode *GADN =
576 dyn_cast<GlobalAddressSDNode>(this)) {
577 int64_t offset = GADN->getOffset();
578 OS << '<';
579 GADN->getGlobal()->printAsOperand(OS);
580 OS << '>';
581 if (offset > 0)
582 OS << " + " << offset;
583 else
584 OS << " " << offset;
585 if (unsigned int TF = GADN->getTargetFlags())
586 OS << " [TF=" << TF << ']';
587 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
588 OS << "<" << FIDN->getIndex() << ">";
589 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
590 OS << "<" << JTDN->getIndex() << ">";
591 if (unsigned int TF = JTDN->getTargetFlags())
592 OS << " [TF=" << TF << ']';
593 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
594 int offset = CP->getOffset();
595 if (CP->isMachineConstantPoolEntry())
596 OS << "<" << *CP->getMachineCPVal() << ">";
597 else
598 OS << "<" << *CP->getConstVal() << ">";
599 if (offset > 0)
600 OS << " + " << offset;
601 else
602 OS << " " << offset;
603 if (unsigned int TF = CP->getTargetFlags())
604 OS << " [TF=" << TF << ']';
605 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
606 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
607 if (unsigned TF = TI->getTargetFlags())
608 OS << " [TF=" << TF << ']';
609 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
610 OS << "<";
611 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
612 if (LBB)
613 OS << LBB->getName() << " ";
614 OS << (const void*)BBDN->getBasicBlock() << ">";
615 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
616 OS << ' ' << printReg(R->getReg(),
617 G ? G->getSubtarget().getRegisterInfo() : nullptr);
618 } else if (const ExternalSymbolSDNode *ES =
619 dyn_cast<ExternalSymbolSDNode>(this)) {
620 OS << "'" << ES->getSymbol() << "'";
621 if (unsigned int TF = ES->getTargetFlags())
622 OS << " [TF=" << TF << ']';
623 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
624 if (M->getValue())
625 OS << "<" << M->getValue() << ">";
626 else
627 OS << "<null>";
628 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
629 if (MD->getMD())
630 OS << "<" << MD->getMD() << ">";
631 else
632 OS << "<null>";
633 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
634 OS << ":" << N->getVT().getEVTString();
636 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
637 OS << "<";
639 printMemOperand(OS, *LD->getMemOperand(), G);
641 bool doExt = true;
642 switch (LD->getExtensionType()) {
643 default: doExt = false; break;
644 case ISD::EXTLOAD: OS << ", anyext"; break;
645 case ISD::SEXTLOAD: OS << ", sext"; break;
646 case ISD::ZEXTLOAD: OS << ", zext"; break;
648 if (doExt)
649 OS << " from " << LD->getMemoryVT().getEVTString();
651 const char *AM = getIndexedModeName(LD->getAddressingMode());
652 if (*AM)
653 OS << ", " << AM;
655 OS << ">";
656 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
657 OS << "<";
658 printMemOperand(OS, *ST->getMemOperand(), G);
660 if (ST->isTruncatingStore())
661 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
663 const char *AM = getIndexedModeName(ST->getAddressingMode());
664 if (*AM)
665 OS << ", " << AM;
667 OS << ">";
668 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
669 OS << "<";
671 printMemOperand(OS, *MLd->getMemOperand(), G);
673 bool doExt = true;
674 switch (MLd->getExtensionType()) {
675 default: doExt = false; break;
676 case ISD::EXTLOAD: OS << ", anyext"; break;
677 case ISD::SEXTLOAD: OS << ", sext"; break;
678 case ISD::ZEXTLOAD: OS << ", zext"; break;
680 if (doExt)
681 OS << " from " << MLd->getMemoryVT().getEVTString();
683 if (MLd->isExpandingLoad())
684 OS << ", expanding";
686 OS << ">";
687 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
688 OS << "<";
689 printMemOperand(OS, *MSt->getMemOperand(), G);
691 if (MSt->isTruncatingStore())
692 OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
694 if (MSt->isCompressingStore())
695 OS << ", compressing";
697 OS << ">";
698 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
699 OS << "<";
700 printMemOperand(OS, *M->getMemOperand(), G);
701 OS << ">";
702 } else if (const BlockAddressSDNode *BA =
703 dyn_cast<BlockAddressSDNode>(this)) {
704 int64_t offset = BA->getOffset();
705 OS << "<";
706 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
707 OS << ", ";
708 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
709 OS << ">";
710 if (offset > 0)
711 OS << " + " << offset;
712 else
713 OS << " " << offset;
714 if (unsigned int TF = BA->getTargetFlags())
715 OS << " [TF=" << TF << ']';
716 } else if (const AddrSpaceCastSDNode *ASC =
717 dyn_cast<AddrSpaceCastSDNode>(this)) {
718 OS << '['
719 << ASC->getSrcAddressSpace()
720 << " -> "
721 << ASC->getDestAddressSpace()
722 << ']';
723 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
724 if (LN->hasOffset())
725 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
728 if (VerboseDAGDumping) {
729 if (unsigned Order = getIROrder())
730 OS << " [ORD=" << Order << ']';
732 if (getNodeId() != -1)
733 OS << " [ID=" << getNodeId() << ']';
734 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
735 OS << " # D:" << isDivergent();
737 if (G && !G->GetDbgValues(this).empty()) {
738 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
739 for (SDDbgValue *Dbg : G->GetDbgValues(this))
740 if (!Dbg->isInvalidated())
741 Dbg->print(OS);
742 } else if (getHasDebugValue())
743 OS << " [NoOfDbgValues>0]";
747 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
748 OS << " DbgVal(Order=" << getOrder() << ')';
749 if (isInvalidated()) OS << "(Invalidated)";
750 if (isEmitted()) OS << "(Emitted)";
751 switch (getKind()) {
752 case SDNODE:
753 if (getSDNode())
754 OS << "(SDNODE=" << PrintNodeId(*getSDNode()) << ':' << getResNo() << ')';
755 else
756 OS << "(SDNODE)";
757 break;
758 case CONST:
759 OS << "(CONST)";
760 break;
761 case FRAMEIX:
762 OS << "(FRAMEIX=" << getFrameIx() << ')';
763 break;
764 case VREG:
765 OS << "(VREG=" << getVReg() << ')';
766 break;
768 if (isIndirect()) OS << "(Indirect)";
769 OS << ":\"" << Var->getName() << '"';
770 #ifndef NDEBUG
771 if (Expr->getNumElements())
772 Expr->dump();
773 #endif
776 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
777 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
778 if (isInvalidated())
779 return;
780 print(dbgs());
781 dbgs() << "\n";
783 #endif
785 /// Return true if this node is so simple that we should just print it inline
786 /// if it appears as an operand.
787 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
788 // Avoid lots of cluttering when inline printing nodes with associated
789 // DbgValues in verbose mode.
790 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
791 return false;
792 if (Node.getOpcode() == ISD::EntryToken)
793 return false;
794 return Node.getNumOperands() == 0;
797 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
798 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
799 for (const SDValue &Op : N->op_values()) {
800 if (shouldPrintInline(*Op.getNode(), G))
801 continue;
802 if (Op.getNode()->hasOneUse())
803 DumpNodes(Op.getNode(), indent+2, G);
806 dbgs().indent(indent);
807 N->dump(G);
810 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
811 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
813 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
814 I != E; ++I) {
815 const SDNode *N = &*I;
816 if (!N->hasOneUse() && N != getRoot().getNode() &&
817 (!shouldPrintInline(*N, this) || N->use_empty()))
818 DumpNodes(N, 2, this);
821 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
822 dbgs() << "\n";
824 if (VerboseDAGDumping) {
825 if (DbgBegin() != DbgEnd())
826 dbgs() << "SDDbgValues:\n";
827 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
828 Dbg->dump();
829 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
830 dbgs() << "Byval SDDbgValues:\n";
831 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
832 Dbg->dump();
834 dbgs() << "\n";
836 #endif
838 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
839 OS << PrintNodeId(*this) << ": ";
840 print_types(OS, G);
841 OS << " = " << getOperationName(G);
842 print_details(OS, G);
845 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
846 const SDValue Value) {
847 if (!Value.getNode()) {
848 OS << "<null>";
849 return false;
850 } else if (shouldPrintInline(*Value.getNode(), G)) {
851 OS << Value->getOperationName(G) << ':';
852 Value->print_types(OS, G);
853 Value->print_details(OS, G);
854 return true;
855 } else {
856 OS << PrintNodeId(*Value.getNode());
857 if (unsigned RN = Value.getResNo())
858 OS << ':' << RN;
859 return false;
863 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
864 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
866 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
867 const SelectionDAG *G, VisitedSDNodeSet &once) {
868 if (!once.insert(N).second) // If we've been here before, return now.
869 return;
871 // Dump the current SDNode, but don't end the line yet.
872 OS.indent(indent);
873 N->printr(OS, G);
875 // Having printed this SDNode, walk the children:
876 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
877 if (i) OS << ",";
878 OS << " ";
880 const SDValue Op = N->getOperand(i);
881 bool printedInline = printOperand(OS, G, Op);
882 if (printedInline)
883 once.insert(Op.getNode());
886 OS << "\n";
888 // Dump children that have grandchildren on their own line(s).
889 for (const SDValue &Op : N->op_values())
890 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
893 LLVM_DUMP_METHOD void SDNode::dumpr() const {
894 VisitedSDNodeSet once;
895 DumpNodesr(dbgs(), this, 0, nullptr, once);
898 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
899 VisitedSDNodeSet once;
900 DumpNodesr(dbgs(), this, 0, G, once);
902 #endif
904 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
905 const SelectionDAG *G, unsigned depth,
906 unsigned indent) {
907 if (depth == 0)
908 return;
910 OS.indent(indent);
912 N->print(OS, G);
914 if (depth < 1)
915 return;
917 for (const SDValue &Op : N->op_values()) {
918 // Don't follow chain operands.
919 if (Op.getValueType() == MVT::Other)
920 continue;
921 OS << '\n';
922 printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2);
926 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
927 unsigned depth) const {
928 printrWithDepthHelper(OS, this, G, depth, 0);
931 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
932 // Don't print impossibly deep things.
933 printrWithDepth(OS, G, 10);
936 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
937 LLVM_DUMP_METHOD
938 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
939 printrWithDepth(dbgs(), G, depth);
942 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
943 // Don't print impossibly deep things.
944 dumprWithDepth(G, 10);
946 #endif
948 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
949 printr(OS, G);
950 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
951 if (i) OS << ", "; else OS << " ";
952 printOperand(OS, G, getOperand(i));
954 if (DebugLoc DL = getDebugLoc()) {
955 OS << ", ";
956 DL.print(OS);