[x86] fix assert with horizontal math + broadcast of vector (PR43402)
[llvm-core.git] / lib / Target / WebAssembly / WebAssemblyISelDAGToDAG.cpp
blobb0c03c13fe60c2685d9580f11528b3b214a56839
1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines an instruction selector for the WebAssembly target.
11 ///
12 //===----------------------------------------------------------------------===//
14 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
15 #include "WebAssembly.h"
16 #include "WebAssemblyTargetMachine.h"
17 #include "llvm/CodeGen/SelectionDAGISel.h"
18 #include "llvm/IR/DiagnosticInfo.h"
19 #include "llvm/IR/Function.h" // To access function attributes.
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/KnownBits.h"
22 #include "llvm/Support/MathExtras.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace llvm;
26 #define DEBUG_TYPE "wasm-isel"
28 //===--------------------------------------------------------------------===//
29 /// WebAssembly-specific code to select WebAssembly machine instructions for
30 /// SelectionDAG operations.
31 ///
32 namespace {
33 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
34 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
35 /// right decision when generating code for different targets.
36 const WebAssemblySubtarget *Subtarget;
38 bool ForCodeSize;
40 public:
41 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
42 CodeGenOpt::Level OptLevel)
43 : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
46 StringRef getPassName() const override {
47 return "WebAssembly Instruction Selection";
50 bool runOnMachineFunction(MachineFunction &MF) override {
51 LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
52 "********** Function: "
53 << MF.getName() << '\n');
55 ForCodeSize = MF.getFunction().hasOptSize();
56 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
57 return SelectionDAGISel::runOnMachineFunction(MF);
60 void Select(SDNode *Node) override;
62 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
63 std::vector<SDValue> &OutOps) override;
65 // Include the pieces autogenerated from the target description.
66 #include "WebAssemblyGenDAGISel.inc"
68 private:
69 // add select functions here...
71 } // end anonymous namespace
73 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
74 // If we have a custom node, we already have selected!
75 if (Node->isMachineOpcode()) {
76 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
77 Node->setNodeId(-1);
78 return;
81 // Few custom selection stuff.
82 SDLoc DL(Node);
83 MachineFunction &MF = CurDAG->getMachineFunction();
84 switch (Node->getOpcode()) {
85 case ISD::ATOMIC_FENCE: {
86 if (!MF.getSubtarget<WebAssemblySubtarget>().hasAtomics())
87 break;
89 uint64_t SyncScopeID =
90 cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
91 MachineSDNode *Fence = nullptr;
92 switch (SyncScopeID) {
93 case SyncScope::SingleThread:
94 // We lower a single-thread fence to a pseudo compiler barrier instruction
95 // preventing instruction reordering. This will not be emitted in final
96 // binary.
97 Fence = CurDAG->getMachineNode(WebAssembly::COMPILER_FENCE,
98 DL, // debug loc
99 MVT::Other, // outchain type
100 Node->getOperand(0) // inchain
102 break;
103 case SyncScope::System:
104 // Currently wasm only supports sequentially consistent atomics, so we
105 // always set the order to 0 (sequentially consistent).
106 Fence = CurDAG->getMachineNode(
107 WebAssembly::ATOMIC_FENCE,
108 DL, // debug loc
109 MVT::Other, // outchain type
110 CurDAG->getTargetConstant(0, DL, MVT::i32), // order
111 Node->getOperand(0) // inchain
113 break;
114 default:
115 llvm_unreachable("Unknown scope!");
118 ReplaceNode(Node, Fence);
119 CurDAG->RemoveDeadNode(Node);
120 return;
123 case ISD::GlobalTLSAddress: {
124 const auto *GA = cast<GlobalAddressSDNode>(Node);
126 if (!MF.getSubtarget<WebAssemblySubtarget>().hasBulkMemory())
127 report_fatal_error("cannot use thread-local storage without bulk memory",
128 false);
130 // Currently Emscripten does not support dynamic linking with threads.
131 // Therefore, if we have thread-local storage, only the local-exec model
132 // is possible.
133 // TODO: remove this and implement proper TLS models once Emscripten
134 // supports dynamic linking with threads.
135 if (GA->getGlobal()->getThreadLocalMode() !=
136 GlobalValue::LocalExecTLSModel &&
137 !Subtarget->getTargetTriple().isOSEmscripten()) {
138 report_fatal_error("only -ftls-model=local-exec is supported for now on "
139 "non-Emscripten OSes: variable " +
140 GA->getGlobal()->getName(),
141 false);
144 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
145 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
147 SDValue TLSBaseSym = CurDAG->getTargetExternalSymbol("__tls_base", PtrVT);
148 SDValue TLSOffsetSym = CurDAG->getTargetGlobalAddress(
149 GA->getGlobal(), DL, PtrVT, GA->getOffset(), 0);
151 MachineSDNode *TLSBase = CurDAG->getMachineNode(WebAssembly::GLOBAL_GET_I32,
152 DL, MVT::i32, TLSBaseSym);
153 MachineSDNode *TLSOffset = CurDAG->getMachineNode(
154 WebAssembly::CONST_I32, DL, MVT::i32, TLSOffsetSym);
155 MachineSDNode *TLSAddress =
156 CurDAG->getMachineNode(WebAssembly::ADD_I32, DL, MVT::i32,
157 SDValue(TLSBase, 0), SDValue(TLSOffset, 0));
158 ReplaceNode(Node, TLSAddress);
159 return;
162 case ISD::INTRINSIC_WO_CHAIN: {
163 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
164 switch (IntNo) {
165 case Intrinsic::wasm_tls_size: {
166 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
167 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
169 MachineSDNode *TLSSize = CurDAG->getMachineNode(
170 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
171 CurDAG->getTargetExternalSymbol("__tls_size", MVT::i32));
172 ReplaceNode(Node, TLSSize);
173 return;
175 case Intrinsic::wasm_tls_align: {
176 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
177 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
179 MachineSDNode *TLSAlign = CurDAG->getMachineNode(
180 WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
181 CurDAG->getTargetExternalSymbol("__tls_align", MVT::i32));
182 ReplaceNode(Node, TLSAlign);
183 return;
186 break;
188 case ISD::INTRINSIC_W_CHAIN: {
189 unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
190 switch (IntNo) {
191 case Intrinsic::wasm_tls_base: {
192 MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
193 assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
195 MachineSDNode *TLSBase = CurDAG->getMachineNode(
196 WebAssembly::GLOBAL_GET_I32, DL, MVT::i32, MVT::Other,
197 CurDAG->getTargetExternalSymbol("__tls_base", PtrVT),
198 Node->getOperand(0));
199 ReplaceNode(Node, TLSBase);
200 return;
203 break;
206 default:
207 break;
210 // Select the default instruction.
211 SelectCode(Node);
214 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
215 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
216 switch (ConstraintID) {
217 case InlineAsm::Constraint_i:
218 case InlineAsm::Constraint_m:
219 // We just support simple memory operands that just have a single address
220 // operand and need no special handling.
221 OutOps.push_back(Op);
222 return false;
223 default:
224 break;
227 return true;
230 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
231 /// for instruction scheduling.
232 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
233 CodeGenOpt::Level OptLevel) {
234 return new WebAssemblyDAGToDAGISel(TM, OptLevel);